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[VHDL-FPGA-Verilog] juzhenqufaqi

Description: 基于FPGA单精度浮点除法器的实现，有一些源代码，仅供参考。-FPGA-based single-precision floating-point divider realization, there are some source code, for reference purposes only.
Platform: | Size: 6144 | Author: helinglin | Hits:

[VHDL-FPGA-Verilog] immediate_float_divide_module

Description: 单精度浮点数除法器。用组合逻辑实现。高精度。-Single-precision floating point divider.
Platform: | Size: 2048 | Author: 张君 | Hits:

[Other] float-point-divider

Description: 基于FPGA的单精度浮点除法器vhdl设计程序,分模块程序。-FPGA-based single-precision floating point divider vhdl design program, sub module program.
Platform: | Size: 6144 | Author: 陈曦 | Hits:

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