Search - serial data transmitter

[Communication] verilog for uart

Description: 通用异步接收器/发送器(UART)是能够编程以控制计算机到附加串行设备的接口的微芯片。详细来说,它提供给计算机RS-...还有高级的UART提供了一定数量的数据缓冲,这样计算机和串行设备数据流就可以保持同样的速度。-universal asynchronous receiver / transmitter (UART) can be programmed to control computer attached to the serial device interface microchips. Details, provide it to the computer RS-High ... UART also provide a certain number of data buffer, computer equipment and serial data stream can maintain the same speed.
Platform: | Size: 9682 | Author: 李志 | Hits:

[Communication] MyCommSend

Description: 一个NMEA格式的GPS数据调试使用的发送端，负责从Log文件中读取CFGPS2通用格式GPS数据向串口发送-a GPS NMEA format debugging data transmitter used for documents from the Log read CFGPS2 GPS common format for sending data to the serial port
Platform: | Size: 33016 | Author: 张积存 | Hits:

[Communication] MyCommSend

[Communication] verilog for uart

Description: 通用异步接收器/发送器(UART)是能够编程以控制计算机到附加串行设备的接口的微芯片。详细来说,它提供给计算机RS-...还有高级的UART提供了一定数量的数据缓冲,这样计算机和串行设备数据流就可以保持同样的速度。-universal asynchronous receiver/transmitter (UART) can be programmed to control computer attached to the serial device interface microchips. Details, provide it to the computer RS-High ... UART also provide a certain number of data buffer, computer equipment and serial data stream can maintain the same speed.
Platform: | Size: 9216 | Author: 李志 | Hits:

[Com Port] UARTchuli

Description: UART 处理的是并行数据转换为串行信号和串行信号转换为并行数据。现有的时钟不精确,这就需要用一个远高于波特率的本地时钟信号对输入信号不断采样,以不断让接收器与发送器保持同步。-UART to handle is the parallel data into a serial signal and serial signal is converted to parallel data. Existing imprecise clock, which requires a much higher than the baud rate of the local clock signal for sampling the input signal continuously to continuously allow the receiver to maintain synchronization with the transmitter.
Platform: | Size: 1024 | Author: xuye | Hits:

[VHDL-FPGA-Verilog] VHDL_UART

Description: VHDL语言的UART串行接口芯片程序,包括数据接收器、数据发送器和波特率发生器等。-VHDL language UART serial interface chip procedure, including data receiver, data transmitter and baud rate generator and so on.
Platform: | Size: 3072 | Author: liukun | Hits:

[Crack Hack] micro-UARTsource_V

Description: UART(即Universal Asynchronous Receiver Transmitter 通用异步收发器)是广泛使用的串行数据传输协议。UART允许在串行链路上进行全双工的通信。-UART (ie Universal Asynchronous Receiver Transmitter Universal Asynchronous Receiver Transmitter) is a widely used serial data transfer protocol. UART allows for full-duplex serial link communications.
Platform: | Size: 5120 | Author: 陈 | Hits:

[VHDL-FPGA-Verilog] A_bit_serial_data_transmitter

Description: 比特序列传送模块把输入的八位比特数据做循环后每个比特输出详细请看英文描述-• To create Verilog-HDL modules written in the RTL style appropriate for both simulation and synthesis, for the various component parts of an Asynchronous Serial Data Transmitter. • To verify the correct behaviour of each component part by means of simulation. • To construct a top-level module corresponding to the Asynchronous Serial Data Transmitter, making use of the component parts developed above, and any additional behavioural elements which may be required. • To verify the correct operation of the top-level design by means of simulation using a Verilog-HDL test-fixture. • To automatically create a hierarchical logic diagram for the Asynchronous Serial Data Transmitter, generated using a Logic Synthesis tool.
Platform: | Size: 2048 | Author: 吴德昊 | Hits:

[VHDL-FPGA-Verilog] TRL_Design_of_a_asynchronous_bit_serial_data_trans

Description: RTL 异步数据传送模块用verilog HDL 语言描述输入为八比特数据，执行操作后异步每比特输出。-• To create Verilog-HDL module written in the RTL style appropriate for both simulation and synthesis, for an Asynchronous Serial Data Transmitter. • To verify the correct behaviour of the transmitter by means of simulation using a Verilog test-module. • To automatically create a logic diagram for the Asynchronous Serial Data Transmitter, generated using a Logic Synthesis tool.
Platform: | Size: 2048 | Author: 吴德昊 | Hits:

[VHDL-FPGA-Verilog] transmitter

Description: 串口模块程序，可以实现串行发送和接收功能，比特率可以不断调整，数据的长度是可以改变的-Serial port module program, you can achieve the serial send and receive functions, and bit rate can be continuously adjusted, the data length can be changed
Platform: | Size: 1024 | Author: 李海 | Hits:

[assembly language] dianpianjin

Description: 单片机串行通信发射机采用串行工作方式，发射并显示两位数字信息，使数据能够在不同地方传递。-Serial Communication transmitter serial work, launch and display the two digital information, so that data can be delivered in different places.
Platform: | Size: 278528 | Author: answerquestions | Hits:

[Other] uart_rx

Description: Tcode is in VERILOG HDL (Hardware description language) code is of UART (universal asynchronous receiver&transmitter) receiver . its objective is to accept serial data from port of computer and allow it to come in a FPGA-Tcode is in VERILOG HDL (Hardware description language) code is of UART (universal asynchronous receiver&transmitter) receiver . its objective is to accept serial data from port of computer and allow it to come in a FPGA
Platform: | Size: 1024 | Author: hassan | Hits:

[Communication] ofdmgen.m

Description: MATLAB program for OFDM generation and reception This is a simple MCM communications system. The code is pretty self-explanatory. Here I have not used the cyclic prefix. Transmitter End: 1. Generate random serial data with M symbols (RANDSRC will do this) 2. Perform modulation (4-PSK = QPSK for now) 3. Serial to parallel 4. IFFT 5. Parallel to serial Receiver end Just opposite of transmitter end.
Platform: | Size: 1024 | Author: snapaj | Hits:

[VHDL-FPGA-Verilog] usefulUART

Description: UART是广泛使用的串行数据通讯电路。本设计包含UART发送器、接收器和波特率发生器。设计应用EDA技术，基于FPGA器件设计与实现UART。 -UART is a widely used serial data communication circuits. This design includes UART transmitter, receiver and baud rate generator. Design and Application of EDA technology, based on FPGA device design and implementation of UART.
Platform: | Size: 4096 | Author: | Hits:

[VHDL-FPGA-Verilog] UARTVHDL

Description: UART是广泛使用的串行数据通讯电路。本设计包含UART发送器、接收器和波特率发生器。设计应用EDA技术，基于FPGA/CPLD器件设计与实现UART。-UART is a widely used serial data communication circuit. The design includes UART transmitter, receiver and baud rate generator. Application of EDA design technology based on FPGA/CPLD device design and implementation of UART.
Platform: | Size: 241664 | Author: 王志慧 | Hits:

[Com Port] UART_T1

Description: UART:Universal Asynchronous Receiver/Transmitter，通用异步接收/发送装置，UART是一个并行输入成为串行输出的芯片，通常集成在主板上，多数是16550AFN芯片。串行接口是一种可以将接受来自CPU的并行数据字符转换为连续的串行数据流发送出去，同时可将接受的串行数据流转换为并行的数据字符供给CPU的器件。一般完成这种功能的电路，我们称为串行接口电路。-UART: Universal Asynchronous Receiver/Transmitter, universal asynchronous receiver/transmitter device, UART is a parallel input into serial output of the chip, usually integrated on the motherboard, most of 16550AFN chip. Serial interface is able to accept the characters from the CPU of the parallel data into serial data stream continuously sent, at the same time will receive the serial data stream into parallel data characters in the supply of the device CPU. General to complete the circuit of this function, we call the serial interface circuit.
Platform: | Size: 278528 | Author: zgd | Hits:

[Other Embeded program] atmega8-reciever-code

Description: this code is for atmegqa8 to act as serial data transmitter for wireless transmitions, for 3 analog data converted to digital and simultaneously displaying it in LCD. code is written in AVR-GCC platform.
Platform: | Size: 25600 | Author: ABK | Hits:

[VHDL-FPGA-Verilog] Serial-port

Description: this a serial port (COM) transmitter module and it is fully synthesizble on fpga it has load, clk, rest and data inputs and serial a,d busy outpus -this is a serial port (COM) transmitter module and it is fully synthesizble on fpga it has load, clk, rest and data inputs and serial a,d busy outpus
Platform: | Size: 271360 | Author: hamid moallemi | Hits:

[Windows Develop] wraddiooi

Description: 无线数传电台串口通信C程序源码源码电台型号为深圳友迅达达公司的F201/B无线数传电台可直接使用。已通过测试。 -The wireless data transmitter serial communication C program source code model radio Shenzhen Friends of fast Dada F201/B wireless data transmitter can be used directly. Has been tested.
Platform: | Size: 2048 | Author: 权力 | Hits:

[VHDL-FPGA-Verilog] UartSend

Description: FPGA Verilog HDL 语言构建串口数据发送器的详细方案设计-FPGA Verilog HDL language construct serial data transmitter detailed program design
Platform: | Size: 8163328 | Author: 刘明来 | Hits:

« 12 3 4 »

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[Communication] verilog for uart

[Communication] MyCommSend

[Communication] MyCommSend

[Communication] verilog for uart

[Com Port] UARTchuli

[VHDL-FPGA-Verilog] VHDL_UART

[Crack Hack] micro-UARTsource_V

[VHDL-FPGA-Verilog] A_bit_serial_data_transmitter

[VHDL-FPGA-Verilog] TRL_Design_of_a_asynchronous_bit_serial_data_trans

[VHDL-FPGA-Verilog] transmitter

[assembly language] dianpianjin

[Other] uart_rx

[Communication] ofdmgen.m

[VHDL-FPGA-Verilog] usefulUART

[VHDL-FPGA-Verilog] UARTVHDL

[Com Port] UART_T1

[Other Embeded program] atmega8-reciever-code

[VHDL-FPGA-Verilog] Serial-port

[Windows Develop] wraddiooi

[VHDL-FPGA-Verilog] UartSend

CodeBus www.codebus.net