Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - modesim

Search list

[Other resource] clk_div3

Description: vhdl语言写的基数分频器，多平台，通过MODESIM仿真-vhdl language to write the base dividers, multi-platform, through simulation MODESIM
Platform: | Size: 39431 | Author: xiaoshichang | Hits:

[File Operate] ModelSimSEfangzhen

Description: modesim的时序仿真和功能仿真!从简单的开始,一步一步的教大家怎么用!
Platform: | Size: 863609 | Author: 段正伟 | Hits:

[MiddleWare] clk_div3

Description: vhdl语言写的基数分频器，多平台，通过MODESIM仿真-vhdl language to write the base dividers, multi-platform, through simulation MODESIM
Platform: | Size: 38912 | Author: | Hits:

[VHDL-FPGA-Verilog] ModelSimSEfangzhen

Description: modesim的时序仿真和功能仿真!从简单的开始,一步一步的教大家怎么用!-modesim timing simulation and functional simulation! from simple to start, step by step and teach everyone how to use them!
Platform: | Size: 863232 | Author: 段正伟 | Hits:

[VHDL-FPGA-Verilog] 200558080220

Description: 基于VHDL的自动售货机设计,希望对大家有点帮助-VHDL-based design of a vending machine, I hope all of you a little help
Platform: | Size: 337920 | Author: 汤文华 | Hits:

[VHDL-FPGA-Verilog] ModelSim_License

Description: Altera Modesim破解版的LICENCE. 下载解压后: 1.直接运行mentorkg.exe(生成的license.txt拷贝到D:\altera\80\modelsim_ae\下或者mentorkg.exe拷贝到此目录下运行). 2.设置环境变量lm_license_file="D:\altera\80\modelsim_ae\license.txt" 3.搞定-Altera Modesim cracked version of the LICENCE. Decompress after download: 1. Direct running mentorkg.exe (generated copy license.txt to the D: altera80modelsim_ae the next copy of this directory or mentorkg.exe run) .2. Lm_license_file = Set environment variables D: altera80modelsim_aelicense.txt 3. get
Platform: | Size: 313344 | Author: xingyu | Hits:

[VHDL-FPGA-Verilog] adder

Description: 高达16位加法器的实现，工作环境在ISE，modesim，该例程较为详细！-Up to 16-bit adder implementation, the working environment at ISE, modesim, the more detailed routines!
Platform: | Size: 51200 | Author: 马高望 | Hits:

[ActiveX/DCOM/ATL] comparator

Description: 该程序能够实现多位数据的比较，运行环境为ISE，modesim，该程序代码简洁！-The program can achieve a number of data comparison, the operating environment for the ISE, modesim, the program code simple!
Platform: | Size: 52224 | Author: 马高望 | Hits:

[Windows Develop] counter16

Description: 该程序为16位计数器，并带有缓存的功能，运行环境为ISE，modesim。-The program for 16-bit counters, with a cache of features, operating environment for the ISE, modesim.
Platform: | Size: 65536 | Author: 马高望 | Hits:

[Other Embeded program] iic

Description: 基于I2C总线协议，该程序用VHDL编写了该协议的源代码，运行环境为ISE，modesim-Based on the I2C bus protocol, the procedures used to prepare the protocol VHDL source code, runtime environment for the ISE, modesim
Platform: | Size: 262144 | Author: 马高望 | Hits:

[Windows Develop] 317

Description: modesim使用简介，包含PLD设计流程和相关内容。-About modesim use, including PLD design process and related content.
Platform: | Size: 505856 | Author: yaya | Hits:

[VHDL-FPGA-Verilog] FIR_Direkt_BAB_P

Description: VHDL编写的代码。采用流水线方法实现的FIR滤波器。22阶。Fa=48kHz, Fc=10KHz。可用ModeSim仿真并FPGA实现-Code written in VHDL. Line method using the FIR filter. 22 bands. Fa = 48kHz, Fc = 10KHz. Can be used to achieve ModeSim simulation and FPGA
Platform: | Size: 1024 | Author: 李乔 | Hits:

[Windows Develop] modesim

Description: modsim软件的使用，是英文版本，对刚接触modsim的人很有帮助-modsim software use, is the English version, useful for people new to modsim
Platform: | Size: 3450880 | Author: xuxiaoqing | Hits:

[Other] modelsim_pli_count

Description: 用count.v和count.c两个文件作为例子，用来说明modelsim的pLI使用方法-using two source files (count.v and count.c ) to demonstrate how to use modesim with PLI
Platform: | Size: 30720 | Author: eastwall | Hits:

[VHDL-FPGA-Verilog] DSP_FIR_Lab

Description: DSP的FIR实验，包含三种FIR实现形式，直接型，转置型，累加型，并且附带testbench,经过modesim测试没问题。-This is DSP FIR lab, it includes there forms to implement FIR, direct form, transposed form and time mulitple form, all code has been tested on Modesim.
Platform: | Size: 7168 | Author: hongwan | Hits:

[Books] Farsight060921FPGA

Description: Modesim 视频教程。工具使用的详细讲解，多个实列的方真讲解。-Modesim video tutorial. Tool use of detailed briefings, a number of real columns side really explain.
Platform: | Size: 19810304 | Author: loveloco | Hits:

[VHDL-FPGA-Verilog] modesim

Description: 讲述使用modelsim进行验证，使用verilogHDL语言进行建模。其中还包括一个讲述怎样用verilog语言编写测试台的详细文档，对fpga cpld设计的后期验证有很大的帮助。-About the use modelsim for authentication, use verilogHDL language modeling. It also includes a focus on how to use verilog test bench written a detailed document on the design of the post-verification fpga cpld very helpful.
Platform: | Size: 2177024 | Author: zhangyujun | Hits:

[VHDL-FPGA-Verilog] eliminate_dithering

Description: 消抖电路的Verilog描述，经过modesim仿真，在板子上调试可行-Debounce Verilog description of the circuit, after modesim simulation, debugging possible on the board
Platform: | Size: 307200 | Author: xillin | Hits:

[VHDL-FPGA-Verilog] 16qam

Description: simulink平台上实现16QAM的解调模型，并用XILINX ISE软件实现modesim仿真-Simulink on a platform of 16QAM demodulation models, modesim and XILINX ISE software simulation
Platform: | Size: 49152 | Author: 张德 | Hits:

[VHDL-FPGA-Verilog] Modelsim

Description: Modelsim百问第一章 modesim功能仿真遇到的问题-the problem about modesim
Platform: | Size: 362496 | Author: danny | Hits:
« 12 »

CodeBus www.codebus.net