Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - fir filter verilog

Search list

[VHDL-FPGA-Verilog] FIR_1

Description: FIR滤波器的verilog实现，实现6级流水线的程序设计。-FIR filter Verilog, has implemented six lines of program design.
Platform: | Size: 1024 | Author: 李甫 | Hits:

[VHDL-FPGA-Verilog] two_d_fir

Description: FIR FILTER verilog code-FIR FILTER Verilog code
Platform: | Size: 26624 | Author: QQ | Hits:

[VHDL-FPGA-Verilog] fir2

Description: Verilog 编写的fir滤波器，可以实现fir滤波器的功能-Verilog prepared by the fir filter can achieve fir filter function
Platform: | Size: 12288 | Author: 宋南 | Hits:

[VHDL-FPGA-Verilog] 8stepSymmetryCoefficientFilter

Description: 8阶对称系数并行FIR滤波器(verilog)用作数字滤波，系数可调。根据实际截止频率决定。-8-order FIR filter symmetric coefficients parallel (verilog) used for digital filtering, adjustable coefficient. Decisions based on the actual cut-off frequency.
Platform: | Size: 1024 | Author: TGY | Hits:

[VHDL-FPGA-Verilog] fir

Description: Verilog 程序， 实现4阶 fir-filter滤波器。 -Verilog procedures, to achieve 4-order filter fir-filter.
Platform: | Size: 1024 | Author: 左麟 | Hits:

[VHDL-FPGA-Verilog] FIR_verilog

Description: 基于verilog的FIR滤波器，有两种实现方法，分别给出仿真波形-Verilog based on the FIR filter, there are two methods, respectively, the simulation waveform
Platform: | Size: 628736 | Author: yejianchao | Hits:

[Communication-Mobile] suAra6Rm

Description: fir滤波器的Verilog程序,看看吧，还不错！-fir filter Verilog procedures, take a look at it, but also good!
Platform: | Size: 4096 | Author: wanghua | Hits:

[VHDL-FPGA-Verilog] 16_FIR

Description: 16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器！-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter!
Platform: | Size: 799744 | Author: yuming | Hits:

[VHDL-FPGA-Verilog] fir_16

Description: fir滤波器-verilog，基于verilog的fir滤波器源码-fir filter-verilog, the fir filter based on the Verilog source code
Platform: | Size: 742400 | Author: zhc | Hits:

[Other] VerilogHDL

Description: 本文主要分析了FIR数字滤波器的基本结构和硬件构成特点,简要介绍了FIR滤波器实现的方式优缺点 结合Altera公司的Stratix系列产品的特点,以一个基于MAC的8阶FIR数字滤波器的设计为例,给出了使用Verilog硬件描述语言进行数字逻辑设计的过程和方法,并且在QuartusⅡ的集成开发环境下编写HDL代码,进行综合 利用QuartusⅡ内部的仿真器对设计做脉冲响应仿真和验证。-This paper analyzes the FIR digital filter structure and the basic hardware features, a brief introduction of the FIR filter the way to achieve the advantages and disadvantages of combining Altera s Stratix series of characteristics of the product, with a MAC based on the 8-order FIR digital filter design For example, given the use of Verilog hardware description language for digital logic design process and methods, and Quartus Ⅱ integrated development environment, prepared HDL code, for comprehensive utilization of Quartus Ⅱ emulator internal design so the impulse response simulation and verification.
Platform: | Size: 79872 | Author: sundan | Hits:

[VHDL-FPGA-Verilog] verilog.DA.FIR..

Description: 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
Platform: | Size: 576512 | Author: 代鑫 | Hits:

[VHDL-FPGA-Verilog] fir

Description: fir滤波器，Verilog语言写的，容易看懂-fir filter, Verilog language written in easy to understand
Platform: | Size: 2048 | Author: 王刚 | Hits:

[VHDL-FPGA-Verilog] fir

Description: Verilog编的fir滤波器，可以自己输入参数序列，产生滤波波形-Verilog compiled fir filter, input parameters can be their own sequence, resulting in filtered waveforms
Platform: | Size: 1024 | Author: lifei | Hits:

[VHDL-FPGA-Verilog] Xilinx-FIR

Description: 基于Xilinx FPGA实现的系数可装载数字滤波器源代码-Configurable Digital Filter Based on FPGA (using Verilog under Matlab 2008a)
Platform: | Size: 3090432 | Author: 胡文静 | Hits:

[Algorithm] fir_filter_verilog

Description: FIR filter verilog project
Platform: | Size: 34816 | Author: Yoshi | Hits:

[Software Engineering] FIR

Description: FIR filter using verilog code
Platform: | Size: 2150400 | Author: Karama | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 实现FIR滤波，利用Verilog语言对其进行了设计 -FIR filter implementation using Verilog language design was carried out
Platform: | Size: 4126720 | Author: 翁萍 | Hits:

[VHDL-FPGA-Verilog] VerilogFIR

Description: low pass FIR filter programmed by Verilog, you can change the coefficients in the program to achieve different response
Platform: | Size: 4225024 | Author: 吴恒 | Hits:

[VHDL-FPGA-Verilog] fir_PGA

Description: 一种基于verilog的fir滤波源码，并带matlab仿真源程序。-Based on the fir filter verilog source code and source code with matlab simulation.
Platform: | Size: 23552 | Author: 对称 | Hits:

[VHDL-FPGA-Verilog] fir filter design

Description: FIR FILTER DESIGN IN VERILOG ON FPGA
Platform: | Size: 18432 | Author: GIRISH | Hits:
« 12 3 4 5 6 7 8 »

CodeBus www.codebus.net