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Title:
fir
Download
Category:
VHDL-FPGA-Verilog
Tags:
[VHDL]
[源码]
File Size:
1.7kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
superzuolin
Description:
Verilog procedures, to achieve 4-order filter fir-filter.
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