Search - fir filter using verilog

[DSP program] TMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究，给了了将乘法化为查表的DA算法，并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证，证明了这一方法是可行和高效的，其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[VHDL-FPGA-Verilog] two_d_fir

Description: FIR FILTER verilog code-FIR FILTER Verilog code
Platform: | Size: 26624 | Author: QQ | Hits:

[VHDL-FPGA-Verilog] fir_Verilog

Description: 用Verilog编写的fir滤波器程序！-Verilog prepared using the procedure fir filter!
Platform: | Size: 5120 | Author: yuming | Hits:

[VHDL-FPGA-Verilog] fir_parall

Description: 基于verilog的fir滤波器设计，用的并行结构。在前面基础上加入四级流水（加法器，并行乘法器，乘法结果相加两级），通过验证。-Verilog-based design of fir filter using the parallel architecture. In front of the basis of adding four water (adder, parallel multiplier, multiply the result of the sum of two), through the verification.
Platform: | Size: 3072 | Author: 张堃 | Hits:

[VHDL-FPGA-Verilog] fir_lms

Description: 基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。-FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.
Platform: | Size: 12288 | Author: 田文军 | Hits:

[VHDL-FPGA-Verilog] fir_liujiao

Description: 利用verilog语言设计实现8路FIR滤波-Using verilog Language Design and Implementation of 8-channel FIR filter
Platform: | Size: 96256 | Author: juan | Hits:

[VHDL-FPGA-Verilog] LMS_filter

Description: verilog HDL 写的LMS滤波器-LMS filter using verilog HDL language
Platform: | Size: 350208 | Author: rayax | Hits:

[VHDL-FPGA-Verilog] Xilinx-FIR

Description: 基于Xilinx FPGA实现的系数可装载数字滤波器源代码-Configurable Digital Filter Based on FPGA (using Verilog under Matlab 2008a)
Platform: | Size: 3090432 | Author: 胡文静 | Hits:

[VHDL-FPGA-Verilog] fir

Description: 数字电路设计中的，fir滤波器设计，我做的是8位宽的，利用vhdl实现，附带了完整的代码，报告，我没有对我的信息进行删除，是希望大家能够诚实的利用这个代码，提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information in the hope that we can use this code for an honest to improve their skills.
Platform: | Size: 3322880 | Author: de de | Hits:

[Program doc] 103244864FIR_filter_DA_machine

Description: 简易fir滤波器，采用分布式算法实现，verilog-Simple fir filter using distributed algorithm, verilog
Platform: | Size: 1024 | Author: wang | Hits:

[Software Engineering] FIR

Description: FIR filter using verilog code
Platform: | Size: 2150400 | Author: Karama | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 实现FIR滤波，利用Verilog语言对其进行了设计 -FIR filter implementation using Verilog language design was carried out
Platform: | Size: 4126720 | Author: 翁萍 | Hits:

[VHDL-FPGA-Verilog] fir

Description: FIR滤波器，使用Verilog硬件描述语言进行编程-FIR filter, using the Verilog hardware description language programming
Platform: | Size: 1024 | Author: zhaoyf | Hits:

[Other] da_fir

Description: 基于verilog的分布式算法FIR滤波器有两个文件一个用来生成查找表-FIR filter using Distributed Algorithm.
Platform: | Size: 2048 | Author: 小关 | Hits:

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[DSP program] TMS320C54x DSP 的cpu和外围设备

[VHDL-FPGA-Verilog] two_d_fir

[VHDL-FPGA-Verilog] fir_Verilog

[VHDL-FPGA-Verilog] fir_parall

[VHDL-FPGA-Verilog] fir_lms

[VHDL-FPGA-Verilog] fir_liujiao

[VHDL-FPGA-Verilog] LMS_filter

[VHDL-FPGA-Verilog] Xilinx-FIR

[VHDL-FPGA-Verilog] fir

[Program doc] 103244864FIR_filter_DA_machine

[Software Engineering] FIR

[VHDL-FPGA-Verilog] FIR

[VHDL-FPGA-Verilog] fir

[Other] da_fir

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] FIR

[VHDL-FPGA-Verilog] FIR

[Software Engineering] CODE-for-FIR-filter

[Other] 基于FPGA和IP核的FIR低通滤波器

[LabView] polyphase fir

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