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[
VHDL-FPGA-Verilog
]
FIFO_EMIF
Description:
实现FPGA通过EMIF总线给DSP定期发送数据的功能-FPGA implementation through the EMIF bus regularly send data to the DSP function
Platform:
|
Size:
1480704
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Author:
徐成发
|
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Search - emif altera fp