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Description: 一个很不错RS编码,用于DVB的信道编码,用VHDL语言编写,在FPGA上通过验证。-A very good RS encoder for DVB Channel Coding using VHDL language, in the FPGA-validated.
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Size: 3072 |
Author: 杨宇 |
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Description: DVB_T系统中信道编码的研究与FPGA实现,一篇很好的说是论文,caj阅读器浏览- Research and FPGA Implementation
of Channel Coding in DVB-T Systems
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Size: 1945600 |
Author: bai |
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Description: DVB系统中交织器和解交织器设计的FPGA实现-DVB system, the reconciliation Interleaver Interleaver design FPGA implementation
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Size: 708608 |
Author: 程钢 |
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Description: DVB数据交织,交织深度I=12,已得到应用!-DVB data interleaving, interleaving depth I = 12, has been applied!
Platform: |
Size: 1024 |
Author: sun |
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