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[VHDL-FPGA-Verilog] addsub_core_

Description: hdl的8051核，不知道好不好用大家试试吧。xilinx公司的核-HDL 8051 nuclear, we know that is really useful to try it. Xilinx's nuclear
Platform: | Size: 1024 | Author: 徐泯 | Hits:

[Embeded-SCM Develop] SIN_fashengqi

Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决 不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。 -2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: | Size: 407552 | Author: 刘斐 | Hits:

[Books] AD9852CompleteDDSandItsApplication

Description: 摘要：AD9852是美国ANALOGDEVICES公司生产的新型直接数字频率合成器(DDS)，具有频率转换速度快(小于lt~s)、频谱纯度高、工作温度范围宽(一25℃～+85℃)、集成度高等特点，是一种使用方便灵活、功能较强的芯片。AD9852由带有48位相位累加的数控振荡器、可墒程参考时钟倍乘器、反向正弦滤波器、计数倍乘器、两个300MHz12住数模转换器、高速模拟比较器和接口逻辑组成。可用于本振合成回路，高精度时钟发生器和FSK／／3PSK调制。文中介绍了AD9852的工作原理、引脚功能以厦具体应用。 -Abstract: AD9852 is Analog Devices Inc. The United States produced a new type of direct digital synthesizers (DDS), with frequency conversion speed (less than lt ~ s), the spectrum of high purity, the working temperature range of width (1 25 ℃ ~+ 85 ℃) , high integration, is a flexible and easy to use, more powerful chips. AD9852 by a cumulative 48 DCO phase can be moisture-way Multiplier times the reference clock, reverse sine filter, multiplying count, two 300MHz12 live digital, high-speed analog comparator, and interface logic composition. Can be used in the synthesis loop vibration, high-precision clock generator and FSK// 3PSK modulation. This paper introduces the working principle of AD9852, pin functions to specific application of Xiamen.
Platform: | Size: 126976 | Author: 梅名 | Hits:

[Embeded-SCM Develop] NIosIIStart

Description: NIosII软处理器快速入门,ALTERA FPGA的NIOSII入门指导-Quick Start NIosII soft processor, ALTERA FPGA s NIOSII Getting Started guide
Platform: | Size: 617472 | Author: leedong | Hits:

[Embeded-SCM Develop] mydds

Description: Direct Digital Synthesis (DDS),最好用的可步进的数字频率发生器的方法，此代码本人亲自编写，用于当年电子设计大赛。注意其中有个模块用于与单片机通信，可以使用、下载到芯片中，仅供学习使用！-Direct Digital Synthesis (DDS), the best use of the digital frequency generator step method, the code I am personally prepared for electronic design contest that year. Attention which has modules for single-chip communication, you can use to download to the chip, only learning to use!
Platform: | Size: 8192 | Author: cjs | Hits:

[VHDL-FPGA-Verilog] DDSverilogsource

Description: DDS的VERILOG原代码，请大家多支持-DDS of the Verilog source code, please support the U.S. more than
Platform: | Size: 3072 | Author: 屈开 | Hits:

[VHDL-FPGA-Verilog] rfid_re

Description: VHDL实现 DDS。大家共享吧，一起学习，一起进步-VHDL realize DDS. U.S. to share it with learning, with progress
Platform: | Size: 866304 | Author: 赵颖 | Hits:

[Other] AD9851

Description: DDS AD9851整理资料DD S AD9851整理资料-DDS AD9851 collate information DD S AD9851 collate information
Platform: | Size: 336896 | Author: tomtan | Hits:

[source in ebook] ad9854_dds

Description: DDS AD9854，软件程序DD S AD9854，软件程序-DDS AD9854, a software program DD S AD9854, a software program
Platform: | Size: 23552 | Author: tomtan | Hits:

[SCM] Mini_DDS

Description: I often need a simple function generator. Just to generate a certain frequency. After all the years I ve worked with electronics, I still haven t got me one. Even though I need it now and then, I just couldn t seem to justify the cost of one. So, standard solution - build one yourself. I designed a simple sinewave generator based on a Analog Devices AD9832 chip. It will generate a sinewave from 0.005 to 12 MHz in 0.005 Hz steps. That s pretty good, and definitely good enough for me ! But while waiting for the AD9832 chip to arrive, I came up with a very simple version of the DDS synth, using just the 2313 and a resistor network. -I often need a simple function generator. Just to generate a certain frequency. After all the years I ve worked with electronics, I still haven t got me one. Even though I need it now and then, I just couldn t seem to justify the cost of one.So, standard solution- build one yourself.I designed a simple sinewave generator based on a Analog Devices AD9832 chip. It will generate a sinewave from 0.005 to 12 MHz in 0.005 Hz steps.That s pretty good, and definitely good enough for me! But while waiting for the AD9832 chip to arrive, I came up with a very simple version of the DDS synth, using just the 2313 and a resistor network.
Platform: | Size: 189440 | Author: 杨正海 | Hits:

[Other] fpga

Description: 大唐公司的内部学习教程，很好的介绍了可编程器件的学习经验-Datang company s internal learning curricula, introduced a very good learning experience programmable devices
Platform: | Size: 966656 | Author: 张宁 | Hits:

[VHDL-FPGA-Verilog] dds

Description: 使用VHDL硬件描述语言实现了直接频率合成器的制作，并在Altera公司的CycloneII上得到实现，验证了代码的正确性。用户操作可以参照程序中的说明，请使用QuartusII6.0以上版本打开，低版本打开时会有错误提示-Using VHDL hardware description language to achieve a direct frequency synthesizer production, and Altera s CycloneII be realized, to verify the correctness of the code. Users can refer to procedures, please use the above QuartusII6.0 open, low-version will be opened error
Platform: | Size: 105472 | Author: xx | Hits:

[SCM] AD9833

Description: 用ADI的DDS信号数字合成芯片，基于AVR单片机的程序，GCC编译通过。-Using ADI' s DDS signal digital synthesis chip, based on the AVR MCU program, GCC compiler through.
Platform: | Size: 37888 | Author: | Hits:

[VHDL-FPGA-Verilog] 32_hottest_forum_CPLD-FPGA

Description: 收集了目前关于FPGA设计的论坛，大家如果有什么疑问，可以到这些论坛上求助。-The collection of the current design of the forum on the FPGA, there is little doubt if the U.S. can go to for help on these forums.
Platform: | Size: 13312 | Author: 张芸 | Hits:

[VHDL-FPGA-Verilog] FPGA_Examples

Description: 《FPGA嵌入式应用系统开发典型实例》-书的光盘资料，该资料是用VHDL语言编写，作者：叶淦华-" FPGA embedded applications typical example of system development" - the book' s CD-ROM, the information is written in VHDL, the author:叶淦China
Platform: | Size: 8140800 | Author: LDP | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 本代码可以用于产生正余弦信号波形，利用FPGA内部的ROM放置一个正余弦采样点的数据表格，通过循环取址的方法，实现波形连续输出。-This code can be used to generate positive cosine signal waveforms, using FPGA' s internal ROM to place a sampling point is the cosine of the data tables, the circulation method of taking the site to achieve a continuous output waveform.
Platform: | Size: 484352 | Author: 蔡野锋 | Hits:

[VHDL-FPGA-Verilog] dds

Description: 这是用VERILOG描写的一个DDS的实例，涉及到一些lpm的运用希望对大家有用-it‘s useful。
Platform: | Size: 881664 | Author: tom | Hits:

[Software Engineering] DDS-FAQ

Description: 美国ADI公司的官方DDS文档，包含了在DDS设计过程中出现的各种问题，并给出了详细的解答。-ADI' s DDS U.S. official documents, including the design process in the DDS issues arise, and gives a detailed answer.
Platform: | Size: 700416 | Author: wang hao | Hits:

[VHDL-FPGA-Verilog] DDS-Verilog-design-and-simulation

Description: DDS的Verilog设计及QuartusⅡ与Matlab联合仿真 -dds s verilog simulation dds s verilog simulation dds s verilog simulation dds s verilog simulation
Platform: | Size: 283648 | Author: 才一句 | Hits:

[SCM] DDS

Description: 基于dds模块的详细应用,基本了解并熟悉掌握它的应用-on the base of dds s application
Platform: | Size: 503808 | Author: 罗有亮 | Hits:
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