Search - dds am

[Embeded-SCM Develop] DDSsignalgen

Description: dds信号发生器-dds signal generator ask, am, fskdds signal generator ask, am, fskdds signal generator ask, am, fskdds signal generator ask, am, FSK
Platform: | Size: 3331072 | Author: appolo | Hits:

[SCM] SINE_SIGNAL_generator_base_on_Single_Chip_Micyoco.

Description: 以SPCE061A单片机（ Single Chip Micyoco）为核心，通过DDS合成技术设计制作了一个步进值能任意调节的多功能信号源。该信号源在1KHz～10MHz范围能输出稳定可调的正弦波，并具有AM、FM、ASK和PSK等调制功能。信号输出部分采用低损耗电流反馈型宽带运放作电压放大，很好地解决了带宽和带负载能力的要求。系统带中文显示和键盘控制功能，操作简便，实现效果良好。内含原程序，正弦信号发生器的pCB原理图，以及一些相关论文。-to SPCE061A (Single Chip Micyoco) at the core, DDS technology through the design of an arbitrary value of Step-conditioned multi-purpose signal source. The signal source in a KHz- 10MHz range stability can be adjustable output sine wave, with AM, FM, ASK and other PSK modulation functions. Part of the output signals using low loss current-feedback operational amplifier for wideband voltage amplification and very good solution with the bandwidth and load capacity requirements. Chinese system with display and keyboard control functions, simple operation, achieving good results. Intron original program, sinusoidal signal generator pCB diagram, and a number of related papers.
Platform: | Size: 520192 | Author: 陈朋 | Hits:

[Other] paper

Description: DDS 详细地讲述了AD9852的使用为北理工一研究生的论文笔者仅是拿出来供大家参考,不盗版之嫌好东西, 大家看-DDS detail AD9852 use one for the Northern Polytechnic graduate thesis the author is just out for your reference, not a good thing smacks of piracy, we look
Platform: | Size: 2465792 | Author: qiumh | Hits:

[VHDL-FPGA-Verilog] DDS1

Description: DDS信号发生器，能产生多种波形，正玄波，三角波，方波，频率可调，相位可调-DDS signal generator, can produce a variety of waveforms, are mysterious wave, triangle wave, square wave, frequency tunable, phase adjustable
Platform: | Size: 1108992 | Author: 张俊 | Hits:

[Embeded-SCM Develop] mydds

Description: Direct Digital Synthesis (DDS),最好用的可步进的数字频率发生器的方法，此代码本人亲自编写，用于当年电子设计大赛。注意其中有个模块用于与单片机通信，可以使用、下载到芯片中，仅供学习使用！-Direct Digital Synthesis (DDS), the best use of the digital frequency generator step method, the code I am personally prepared for electronic design contest that year. Attention which has modules for single-chip communication, you can use to download to the chip, only learning to use!
Platform: | Size: 8192 | Author: cjs | Hits:

[VHDL-FPGA-Verilog] DDS-320-modu

Description: 在采用 320x240 屏的设计实验箱上运行，产生正弦波，调幅调频波形，扫频。-320x240 screen using the design of experiments to run me generate sine wave, AM FM waveforms, sweep.
Platform: | Size: 1250304 | Author: hangyinli | Hits:

[SCM] microcontroller

Description: 本系统以51单片机为控制核心，由正弦信号发生模块、功率放大模块、调幅（AM）、调频（FM）模块、数字键控（ASK，PSK）模块以及测试信号发生模块组成。采用数控的方法控制DDS芯片AD9850产生0Hz－30MHz正弦信号，经滤波、放大和功放模块放大至6v并具有一定的驱动能力。测试信号发生模块产生的1kHz正弦信号经过调幅（AM）模块、调频（FM）模块，对高频载波进行调幅或调频。二进制基带序列信号送入数字键控模块，产生二进制PSK或ASK信号，同时对ASK信号进行解调，恢复出原始数字序列。另外，本系统从简单、调整方便、功能完备为出发点，基本实现了设计中的要求，波形输出较稳定，且精度较高。本设计还配备有LED显示屏、键盘，提供了友好的人机交互界面。 -err
Platform: | Size: 2031616 | Author: 何勇 | Hits:

[VHDL-FPGA-Verilog] AM

Description: FPGA内AM调制工程。内带调制波、载波生成。关键词：FPGA verilog AM DDS-AM modulation works within the FPGA. Within the band modulation wave generated carrier. Key words: FPGA verilog AM DDS
Platform: | Size: 1687552 | Author: baixiangzhou | Hits:

[SCM] AD9959

Description: 程序主要编写了DDS芯片AD9959的驱动，并实现了其相应的功能，如AM、FM等-Program and wrote a DDS chip AD9959 driver, and achieved its corresponding features, such as AM, FM, etc.
Platform: | Size: 113664 | Author: wei | Hits:

[VHDL-FPGA-Verilog] dds_final

Description: 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjustable modulation. DA-chip 8-bit parallel, 160MHz
Platform: | Size: 1638400 | Author: nostalgia | Hits:

[VHDL-FPGA-Verilog] DDS(fsk-ask-psk)

Description: 基于VHDL的波形调制，其中包括调频、调幅，调脉宽等-VHDL-based waveform modulation, including FM, AM, pulse width modulation
Platform: | Size: 6747136 | Author: 王展 | Hits:

[VHDL-FPGA-Verilog] eda

Description: 南京理工大学EDA实验多功能数字钟+闹钟+dds+am调幅。-Nanjing University of EDA test multifunction digital clock+ alarm+ dds+ am AM.
Platform: | Size: 8145920 | Author: 吴逸汀 | Hits:

[VHDL-FPGA-Verilog] DAC908-AM-FM--sinsin

Description: 基于FPGA的DDS发生器以及AM、FM模拟调制-The DDS generator and FPGA-based AM, FM analog modulation
Platform: | Size: 1676288 | Author: xuexun | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 能在DDS中用Verilog HDL语言实现FM,AM,FSK,ASK,PSK，结合可编程器件FGPA等等就能实现这些功能 -DDS can be used in Verilog HDL language FM, AM, FSK, ASK, PSK, etc. FGPA programmable devices can be combined to achieve these functions
Platform: | Size: 6281216 | Author: 王凡 | Hits:

[VHDL-FPGA-Verilog] dds

Description: dds数字信号发生器，实现1/4rom存储，正弦，余弦，三角波，锯齿波产生，AM调制-the dds digital signal generator, achieve 1/4rom store, generate sine, cosine, triangle wave, sawtooth, AM modulation
Platform: | Size: 783360 | Author: guizi | Hits:

[VHDL-FPGA-Verilog] ddslabview

Description: The reference design and example presented in this article illustrates how you can add a DDS (direct digital synthesis) waveform generator to your LabVIEW FPGA based applicationThe examples for this article are contained in a LabVIEW 8.5.1 project.
Platform: | Size: 3274752 | Author: charlysed | Hits:

[MiddleWare] am

Description: 基于FPGA的DDS，产生任意频率的正弦波，并且加入am调制-Generate any frequency sine wave, and join am modulation based on FPGA DDS
Platform: | Size: 454656 | Author: MR su | Hits:

[Program doc] DDS

Description: 频率切换时间短、工作频率范围宽、频率分辨率高、相位变化连续和容易对输出信号实现调制等。一些公司先后推出了各种各样的DDS专用芯片，这些DDS专用芯片为电路设计提供了很大方便，但是并不能满足所有要求。例如，在实现调频及调幅等复杂功能时，利用现有专用芯片就会很不方便。利用可编程逻辑器件或现场可编程门阵列实现具有很大的灵活性，能够很好地满足电路设计要求。 -Frequency switching time is short, the operating frequency range, high frequency resolution, phase changes continuously and easy to achieve modulation of the output signal. Some companies have introduced a variety of DDS dedicated chip, these dedicated DDS chip circuit design provides great convenience, but does not meet all the requirements. For example, in the realization of complex functions such as FM and AM, the use of existing ASIC will be very convenient. The use of programmable logic devices, or field programmable gate array implementation has great flexibility, can well meet the circuit design requirements.
Platform: | Size: 456704 | Author: 李梓玉 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: DDS的FPGA实现(VHDL),只可调频，调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
Platform: | Size: 546816 | Author: WSong | Hits:

[VHDL-FPGA-Verilog] dds

Description: 这是一个基于ＦＰＧＡ设计的ＤＤＳ信号发生器设计。能够生成正弦波＼ＡＳＫ＼ＰＳＫ＼ＡＭ＼ＦＭ等波形。-This is an FPGA design of DDS signal generator based on. Capable of generating sine \ASK\PSK\AM\FM and other waveforms.
Platform: | Size: 1008640 | Author: 张良 | Hits:

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[Embeded-SCM Develop] DDSsignalgen

[SCM] SINE_SIGNAL_generator_base_on_Single_Chip_Micyoco.

[Other] paper

[VHDL-FPGA-Verilog] DDS1

[Embeded-SCM Develop] mydds

[VHDL-FPGA-Verilog] DDS-320-modu

[SCM] microcontroller

[VHDL-FPGA-Verilog] AM

[SCM] AD9959

[VHDL-FPGA-Verilog] dds_final

[VHDL-FPGA-Verilog] DDS(fsk-ask-psk)

[VHDL-FPGA-Verilog] eda

[VHDL-FPGA-Verilog] DAC908-AM-FM--sinsin

[VHDL-FPGA-Verilog] DDS

[VHDL-FPGA-Verilog] dds

[VHDL-FPGA-Verilog] ddslabview

[MiddleWare] am

[Program doc] DDS

[VHDL-FPGA-Verilog] DDS

[VHDL-FPGA-Verilog] dds

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