Description: The reference design and example presented in this article illustrates how you can add a DDS (direct digital synthesis) waveform generator to your LabVIEW FPGA based applicationThe examples for this article are contained in a LabVIEW 8.5.1 project.
- [SPI_VHDL] - the SPI Serial Kernel (vhdl) can be used
- [chirp_sig11] - With matched filter radar signal modulat
- [EXCEL] - Using the serial input data, real-time w
- [lpc2378] - file pcb lpc2378 development board
- [matpower4.0b4] - See http://www.pserc.cornell.edu/matpowe
- [MB_LOGIC_LV] - run labview programs on xilinx fpga boar
- [IGBT_MODEL] - IGBT' s matlab simulation and realiza
File list (Check if you may need any files):
gen dds on target fpga labview\FPGA DDS Generation\FPGA\FPGA DDS Generation Sine 1-ch.vi
..............................\...................\....\FPGA DDS Generation Sine 3-ch with Acquisition.vi
..............................\...................\....\FPGA DDS Generation Sine 3-ch with DMA Monitor.vi
..............................\...................\....\FPGA DDS Generation Sine 3-ch.vi
..............................\...................\....\FPGA DDS Generation Triangle 3-ch with DMA Monitor.vi
..............................\...................\....\FPGA DDS SineGen IP.vi
..............................\...................\....\FPGA DDS TriangleGen IP.vi
..............................\...................\....\Untitled Project 1.aliases
..............................\...................\....\Untitled Project 1.lvlps
..............................\...................\....\Untitled Project 1.lvproj
..............................\...................\Host\Host Calculate FPGA Loop Rate.vi
..............................\...................\....\Host DDS Generation Calculate FPGA Parameters.vi
..............................\...................\....\Host DDS Generation Sine 1-ch.vi
..............................\...................\....\Host DDS Generation Sine 3-ch with Acquisition.vi
..............................\...................\....\Host DDS Generation Sine 3-ch with DMA Monitor.vi
..............................\...................\....\Host DDS Generation Sine 3-ch.vi
..............................\...................\....\Host DDS Generation Triangle 3-ch with DMA Monitor.vi
..............................\...................\LV FPGA DDS Generator.aliases
..............................\...................\LV FPGA DDS Generator.lvproj
..............................\lvfpgaddsgen10rc1.zip
..............................\understanding dds.pdf
..............................\Visión General.docx
..............................\FPGA DDS Generation\FPGA
..............................\...................\FPGA Bitfiles
..............................\...................\Host
..............................\FPGA DDS Generation
gen dds on target fpga labview
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