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[Other resource] tbcpu8bit2

Description: 极小的CPU的VHDL源代码，仅需要占用32个宏单元的CPLD。除了VHDL源代码还包括了汇编器的C源代码-minimal CPU VHDL source code, only occupy 32 macrocell CPLD. Apart from VHDL source code also includes a compilation of C source code
Platform: | Size: 206008 | Author: 冰激凌 | Hits:

[Embeded-SCM Develop] cpu

Description: 本课程设计主要解决用CPLD芯片编程，实现基本模型机中的CPU功能。为方便地址显示灯观测，地址寄存器仍用试验装置上的电路单元，微程序控制器也用实验板上的单元电路提供，CPU的其余各个模块全部写入CPLD中。
Platform: | Size: 178104 | Author: 朱艳云 | Hits:

[Other] rr

Description: 该文件为S3C2410硬件平台的键盘程序。HD7279A的数据是通过CPLD作为与S3C241O通讯的接口，CPU通过在相应地址上的读写CPLD，即可与HD7279 进行有效的通讯。由于CPLD是通过CPU的NGCS4选择的，所以向CPLD读写均需要使用NGCS4
Platform: | Size: 14280 | Author: wangdi | Hits:

[Other resource] CPLD80386

Description: 使用CPLD仿真一个80383的CPU,很值得参考一下,难得
Platform: | Size: 236515 | Author: 梁志洪 | Hits:

[Other resource] CpldVhdl

Description: 用VHDL语言写的程序包含如下功能：1.键盘扫描2.控制AD转换3.产生PWM信号与51系列CPU接口，接在51地址数据总线上，单片机通过访问地址总线上的数据寄存器来控制CPLD
Platform: | Size: 455438 | Author: liubaogui | Hits:

[Other] sd_IP

Description: SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU, Cyclone, but I think it can works with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and CPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core. Good luck
Platform: | Size: 8911 | Author: tuya | Hits:

[Other resource] slim_vme_8051

Description: 在对存储空间要求非常严格的嵌入式系统中用CPU下载CPLD的代码，比如51系列的单片机。-storage space in the very strict requirements of embedded CPU system used to download CPLD code, for example, the MCU 51.
Platform: | Size: 11359 | Author: 可可 | Hits:

[Embeded-SCM Develop] vme2hex

Description: 在嵌入式系统中用CPU下载CPLD的代码，这是最后将VME文件转成HEX文件的代码。--Download CPLD through CPU in embedded system. This is the code to convert VME file to HEX file in the end.
Platform: | Size: 12035 | Author: 可可 | Hits:

[Embeded-SCM Develop] ATmega128

Description: ATmega128实验板 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 开发环境： WINAVR,ISE6,AVR Studio
Platform: | Size: 9936705 | Author: yhui | Hits:

[Embeded-SCM Develop] vme2hex

Description: 在嵌入式系统中用CPU下载CPLD的代码，这是最后将VME文件转成HEX文件的代码。--Download CPLD through CPU in embedded system. This is the code to convert VME file to HEX file in the end.
Platform: | Size: 11264 | Author: 可可 | Hits:

[VHDL-FPGA-Verilog] tbcpu8bit2

Description: 极小的CPU的VHDL源代码，仅需要占用32个宏单元的CPLD。除了VHDL源代码还包括了汇编器的C源代码-minimal CPU VHDL source code, only occupy 32 macrocell CPLD. Apart from VHDL source code also includes a compilation of C source code
Platform: | Size: 205824 | Author: 冰激凌 | Hits:

[Embeded-SCM Develop] cpu

Description: 本课程设计主要解决用CPLD芯片编程，实现基本模型机中的CPU功能。为方便地址显示灯观测，地址寄存器仍用试验装置上的电路单元，微程序控制器也用实验板上的单元电路提供，CPU的其余各个模块全部写入CPLD中。-This course is primarily designed to solve using CPLD chip programming, the realization of the basic model of the CPU functional machine. To facilitate the address display lamp observation, the address register is still used on the test device circuit modules, micro-program controller also used the experiment to provide circuit board modules, CPU modules all remaining write in CPLD.
Platform: | Size: 178176 | Author: 朱艳云 | Hits:

[VHDL-FPGA-Verilog] CPLD80386

Description: 使用CPLD仿真一个80383的CPU,很值得参考一下,难得-CPLD using a 80,383 emulation of CPU, is worth a reference, a rare
Platform: | Size: 236544 | Author: 梁志洪 | Hits:

[VHDL-FPGA-Verilog] CpldVhdl

Description: 用VHDL语言写的程序包含如下功能：1.键盘扫描2.控制AD转换3.产生PWM信号与51系列CPU接口，接在51地址数据总线上，单片机通过访问地址总线上的数据寄存器来控制CPLD-VHDL language used to write the procedure that contains the following functions: 1. Keyboard scan 2. Control of AD converters 3. Generate PWM signals with the 51 series CPU interface, and then in the address data bus 51, the single-chip by visiting the address bus data Register to control the CPLD
Platform: | Size: 455680 | Author: liubaogui | Hits:

[Embeded-SCM Develop] ATmega128

Description: ATmega128实验板 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 开发环境： WINAVR,ISE6,AVR Studio-ATmega128 board briefly introduce the experiment: the main chips: CPU: ATmega128L SRAM: SR61L256BS-8 CPLD: XILINX XC95144XL SFLASH: AT45DB081B ETHERNET: CS8900A USB: PDIUSBD12 LCD: 122x32 LMC62_095_M POWER: LM2596S-3.3 RS232: MAX3232 software: RS232, SRAM, CPLD Debug through, uCosII can run, ethernet part not completed, usb part completed. Development Environment: WINAVR, ISE6, AVR Studio
Platform: | Size: 9936896 | Author: yhui | Hits:

[VHDL-FPGA-Verilog] MICO8_DEMO_03_18_08.ZIP

Description: Lattice 超精简8位软核CPU--Mico8，开放所有源代码，包括VHDL，编译器，支持GCC编译器。可在Lattice所有FPGA和MachXO 器件上使用。本例包含示例和说明文档。对使用Lattice器件的用户或者学习CPU设计的人员有较高参考价值。-Lattice super-streamlined eight soft-core CPU- Mico8, open up all the source code, including VHDL, the compiler to support the GCC compiler. Lattice can all FPGA and MachXO devices use. In this case contains examples and documentation. On the use of Lattice devices users or learning CPU design personnel have a higher reference value.
Platform: | Size: 3317760 | Author: ymjcloud | Hits:

[VHDL-FPGA-Verilog] mcpu_1.06b

Description: MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD - one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable educational tool. The source code is just a single page and easily understood. Both VHDL and Verilog versions are supplied. The package comes with assembler, emulator and extensive documentation.-MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD- one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable educational tool. The source code is just a single page and easily understood. Both VHDL and Verilog versions are supplied. The package comes with assembler, emulator and extensive documentation.
Platform: | Size: 248832 | Author: eldis | Hits:

[VHDL-FPGA-Verilog] soc-gr0040-010309

Description: xsoc vhdl verilog risc cpu soc implementation in very liitle cpld or fpga
Platform: | Size: 406528 | Author: urga turg | Hits:

[VHDL-FPGA-Verilog] lariviere2008uclinux

Description: xsoc vhdl verilog risc cpu soc implementation in very liitle cpld or fpga
Platform: | Size: 252928 | Author: urga turg | Hits:

[SCM] ATmega128

Description: 简要介绍： 主要芯片： CPU:ATmega128L SRAM:SR61L256BS-8 CPLD:XILINX XC95144XL SFLASH:AT45DB081B ETHERNET:CS8900A USB:PDIUSBD12 LCD:122x32 LMC62_095_M POWER:LM2596S-3.3 RS232:MAX3232 软件：RS232,SRAM,CPLD调试通过，uCosII可以运行，ethernet部分没有完成，usb完成了一部分。 -HD MP3 USE MEGA128
Platform: | Size: 11170816 | Author: shi | Hits:
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