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[Software Engineeringapb

Description: APB master verilog code
Platform: | Size: 1024 | Author: Ajay | Hits:

[VHDL-FPGA-Verilogapb2ahb

Description: verilog code for apb to ahb convert
Platform: | Size: 1024 | Author: peng | Hits:

[OtherRTC

Description: verilog编写的RTC(实时时钟)包含APB总线接口、时钟计时部分等-verilog prepared by the RTC (real time clock) contains APB bus interface, clock time some other
Platform: | Size: 12288 | Author: 郭晓进 | Hits:

[VHDL-FPGA-Verilogau

Description: 基于APB总线的uart控制器,包括源码和vcs脚本-UART controller based on AMBA APB
Platform: | Size: 7168 | Author: Samuel Xu | Hits:

[VHDL-FPGA-VerilogAPB

Description: It s the verilog source code for AMBA APB 2.0 Slave
Platform: | Size: 4096 | Author: nachi | Hits:

[Static controlLIP1701CORE_system_watchdog

Description: System watchdog verilog code
Platform: | Size: 287744 | Author: jc | Hits:

[VHDL-FPGA-VerilogAMBA-Bus_Verilog_Model

Description: 该源码包是2.0版本的AMBA总线的Verilog语言模型,主要包括5个部分:AHB总线仲裁器,AHB-APB总线桥接器,AHB总线上从设备ROM模型,AHB总线上从设备RAM模型,参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave,Defines.
Platform: | Size: 17408 | Author: jinjin | Hits:

[VHDL-FPGA-Veriloga_vhdl_8253_timer_latest.tar

Description: 一个apb总线控制8253的verilog源代码,符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification
Platform: | Size: 107520 | Author: 蔡搏 | Hits:

[VHDL-FPGA-VerilogI2C

Description: iic总线挂接在amba的apb总线上,标准接口,verilog代码的实现-iic bus attached to the amba' s apb bus, standard interfaces, verilog code implementation
Platform: | Size: 463872 | Author: 蔡搏 | Hits:

[VHDL-FPGA-Verilogahb2apb

Description: Verilog实现的AHB2APB bridge代码-Verilog code to achieve the AHB2APB bridge
Platform: | Size: 4096 | Author: 杨奔 | Hits:

[VHDL-FPGA-VerilogAhb2Apb

Description: AHB总线协议转APB总线协议的接口IP,使用Verilog代码实现,有详细的英文注释(AHB bus protocol turn APB bus interface IP, use Verilog code implementation, and have a detailed knowledge of the English comments)
Platform: | Size: 5120 | Author: local_boy | Hits:

[VHDL-FPGA-Verilogapb.v

Description: AMBA总线apb总线的verilog代码以及相关的中断控制。(AMBA bus apb bus verilog code and associated interrupt control.)
Platform: | Size: 805888 | Author: 卧室一条鱼 | Hits:

[VHDL-FPGA-Verilogapb

Description: APB 总线。可以实现单个数据在总机与从机之间的读写功能(This can achieve the read and write functions of a single data between the master and the slave .)
Platform: | Size: 1024 | Author: zxppppppppp | Hits:

[Otherapb

Description: Verilog code for APB Protocol
Platform: | Size: 1024 | Author: Tan Nguyen | Hits:

[Otherapb_timer

Description: Verilog code of timer for APB
Platform: | Size: 2048 | Author: Tan Nguyen | Hits:

[DocumentsDesktop

Description: apb sourc code in verilog
Platform: | Size: 431104 | Author: kumaru | Hits:

[Crack Hackapbtoaes128_latest.tar

Description: verilog实现的AES加解密程序,接口为APB总线。(AES encryption and decryption program implemented by Verilog)
Platform: | Size: 199680 | Author: ssdgf | Hits:

[Internet-Networkapb-uart

Description: apb—uart模块,实现中断处理和异步收发数据并处理(APB - UART module, interrupting processing and asynchronous receiving and receiving data and processing)
Platform: | Size: 4096 | Author: 王大柱 | Hits:

[VHDL-FPGA-Verilogapb_uart

Description: 这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)
Platform: | Size: 2048 | Author: megmand | Hits:

[VHDL-FPGA-Verilog24_Timer

Description: 使用Verilog编写的24位定时器,具有apb 总线接口,可以设置工作方式和计数初值。(The 24-bit timer written by Verilog has APB bus interface, which can set working mode and count initial value.)
Platform: | Size: 1024 | Author: libus | Hits:
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