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[VHDL-FPGA-Verilog] FPGA_LMS

Description: VHDL写的LMS算法程序。利用本地正弦信号，根据LMS算法对输入信号进行跟踪。用以产生和输入信号同频同相的本地信号。-VHDL LMS algorithm written procedures. The use of local sinusoidal signal, according to the LMS algorithm for tracking the input signal. Used to produce and the input signal with frequency phase with the local signal.
Platform: | Size: 270336 | Author: 黄鹤 | Hits:

[VHDL-FPGA-Verilog] fir6dlms

Description: lms的verilog代码，我找了好久在才找的的，好东西，大家一起学习-LMS of the Verilog code, I am looking for a long time before looking at the good things we can work together to learn
Platform: | Size: 1024 | Author: 李允 | Hits:

[VHDL-FPGA-Verilog] AdaptiveLMSequalizer

Description: 通信中的用的LMS均衡算法VHDL实现，代码不长，很容易看懂-Communication with the LMS equalization algorithm to achieve VHDL code is not long, it is easy to understand
Platform: | Size: 3072 | Author: 王王 | Hits:

[VHDL-FPGA-Verilog] lms

Description: 一个不错的关于lms算法的verilog代码，算然只有两级，但是对了解lms用HDL描述有很好的理解作用。希望对大家有用~-A good lms algorithm on the verilog code, development environment, I can not find, even if the vhdl it! We hope to be useful
Platform: | Size: 1024 | Author: onion | Hits:

[VHDL-FPGA-Verilog] fir_lms

Description: 一个不错的关于lms算法的verilog代码，算然只有两级，但是对了解lms用HDL描述有很好的理解作用。希望对大家有用~-A good lms algorithm on the verilog code, development environment, I can not find, even if the vhdl it! We hope to be useful
Platform: | Size: 1024 | Author: onion | Hits:

[VHDL-FPGA-Verilog] LMS_

Description: Implement LMS vhdl code.
Platform: | Size: 1024 | Author: Hem | Hits:

[VHDL-FPGA-Verilog] ERROR_COUNTING_BLOCK

Description: vhdl code for error counting blk in lms algorithm
Platform: | Size: 5120 | Author: lekshmi | Hits:

[VHDL-FPGA-Verilog] trunk

Description: code for adaptive lms equilizer
Platform: | Size: 29696 | Author: subha | Hits:

[VHDL-FPGA-Verilog] LMS-vhdl-coad-

Description: 基于quartus的LMS 自适应滤波器代码，适合初学者 -The LMS adaptive filter based on quartus code, suitable for beginners
Platform: | Size: 15360 | Author: jialiangquan | Hits:

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