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Title:
dianzizhong
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Category:
VHDL-FPGA-Verilog
Tags:
File Size:
538.64kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
liu_henghui
Description:
This is my learning process in the middle of the 10-minute program, containing various clock module and the counter, accumulator, and can download, compile!
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