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Title:
manchester_verilog
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Category:
VHDL-FPGA-Verilog
Tags:
[WORD]
File Size:
9.62kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
liming_nefu
Description:
manchesite time coding, VERILOG language, VHDL I find a site in a posting
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