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Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: scan_led Download
 Description: LED verilog 8 legs display Verilog
 Downloaders recently: [More information of uploader zkylsf]
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File list (Check if you may need any files):
FilenameSizeDate
scan_led\db\logic_util_heursitic.dat 0 2019-05-30
scan_led\db\prev_cmp_scan_led.qmsg 7561 2019-05-30
scan_led\db\scan_led.(0).cnf.cdb 5775 2019-05-30
scan_led\db\scan_led.(0).cnf.hdb 1913 2019-05-30
scan_led\db\scan_led.cbx.xml 90 2019-05-30
scan_led\db\scan_led.cmp.rdb 3667 2019-05-30
scan_led\db\scan_led.cmp_merge.kpt 208 2019-05-30
scan_led\db\scan_led.db_info 138 2019-05-30
scan_led\db\scan_led.fit.qmsg 3208 2019-05-30
scan_led\db\scan_led.hier_info 1430 2019-05-30
scan_led\db\scan_led.hif 768 2019-05-30
scan_led\db\scan_led.lpc.html 430 2019-05-30
scan_led\db\scan_led.lpc.rdb 388 2019-05-30
scan_led\db\scan_led.lpc.txt 1060 2019-05-30
scan_led\db\scan_led.map.kpt 1830 2019-05-30
scan_led\db\scan_led.map.qmsg 3134 2019-05-30
scan_led\db\scan_led.map_bb.hdb 7254 2019-05-30
scan_led\db\scan_led.pre_map.cdb 5295 2019-05-30
scan_led\db\scan_led.pre_map.hdb 9803 2019-05-30
scan_led\db\scan_led.rtlv.hdb 9789 2019-05-30
scan_led\db\scan_led.rtlv_sg.cdb 4864 2019-05-30
scan_led\db\scan_led.rtlv_sg_swap.cdb 177 2019-05-30
scan_led\db\scan_led.sgdiff.cdb 6317 2019-05-30
scan_led\db\scan_led.sgdiff.hdb 10336 2019-05-30
scan_led\db\scan_led.sld_design_entry.sci 196 2019-06-25
scan_led\db\scan_led.sld_design_entry_dsc.sci 196 2019-05-30
scan_led\db\scan_led.smart_action.txt 8 2019-05-30
scan_led\db\scan_led.syn_hier_info 0 2019-05-30
scan_led\db\scan_led.tis_db_list.ddb 173 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.db_info 138 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.root_partition.map.cdb 6353 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.root_partition.map.dpi 680 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.root_partition.map.hbdb.cdb 609 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.root_partition.map.hbdb.hb_info 46 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.root_partition.map.hbdb.hdb 10691 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.root_partition.map.hbdb.sig 29 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.root_partition.map.hdb 11084 2019-05-30
scan_led\incremental_db\compiled_partitions\scan_led.root_partition.map.kpt 1830 2019-05-30
scan_led\incremental_db\README 653 2019-05-30
scan_led\scan_led.fit.rpt 13000 2019-05-30
scan_led\scan_led.fit.summary 493 2019-05-30
scan_led\scan_led.flow.rpt 6457 2019-05-30
scan_led\scan_led.map.rpt 14385 2019-05-30
scan_led\scan_led.map.summary 673 2019-05-30
scan_led\scan_led.qpf 1269 2019-05-30
scan_led\scan_led.qsf 2604 2019-06-25
scan_led\scan_led.v 3005 2019-05-30
scan_led\scan_led.v.bak 3005 2019-05-30
scan_led\Verilog1.v 2855 2019-06-04
scan_led\Verilog1.v.bak 8066 2019-06-03
scan_led\incremental_db\compiled_partitions 0 2019-06-16
scan_led\db 0 2019-06-25
scan_led\incremental_db 0 2019-06-16
scan_led 0 2019-06-16

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