- Category:
- HardWare Design
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- File Size:
- 30kb
- Update:
- 2016-10-12
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- Uploaded by:
- 梁艺
Description: Power input at the front end of the use of bypass decoupling capacitor filter when+12V input through a first electrolytic capacitor C1 and capacitor C2 ensure that the input voltage is stable, then choose to use the output voltage regulator NCP1117ST50T3G down+5V, FIG. Figure 3.5, the output current is 1A. After the regulator continue to use a electrolytic capacitor C3 to ensure that the input to the chip supply voltage stable.
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