- Category:
- VHDL-FPGA-Verilog
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- File Size:
- 3kb
- Update:
- 2013-11-21
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- Uploaded by:
- hj
Description: - Filename: uart.vhd- Author: ZRtech- Description: serial port receive and transmit programs- the function of this module is to verify the basic realization and PC serial communication functions. Need to install one on the PC serial port debugging tool to verify- program function. Program implements a transceiver a 10 bit (ie, no parity bit) serial controller, 10 bit is a start bit- 8 data bits, 1 stop bit. Baud-law by the parameters defined in the program div_par decision to change the parameter can achieve the corresponding wave- special rates. Program is currently set div_par value is 0x145, corresponding to the baud rate is 9600. 8 times the baud rate by a clock to transmit or- by the cycle time of each bit is divided into eight time slots to the communication sync.- Called by: Top module- Revision History :10-5- 20- Revision 1.0- Company: ZRtech Technology. Inc- Copyright (c) 2010, ZRtech Technology Inc, All right reserved
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uart-to-GPIO.vhd
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