Description: baud rate generator design, here is the realization of the above-mentioned functional VHDL source code for all learning and discussion.
- [oneyuanreunification.Rar] - one yuan regression forecast in many pla
- [ddfs] - my own use VHDL to achieve series dds, a
- [I2S] - This is a I2S interface VHDL source code
- [FPGAprogram2] - The VHDL source program of semi-integer
- [FPGAprogram5] - NC oscillator frequency control word reg
- [RISC-8] - the RISC8 bit microcontrollers
- [VHDL_UART] - VHDL language UART serial interface chip
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