- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 87kb
- Update:
- 2013-05-06
- Downloads:
- 0 Times
- Uploaded by:
- 李丛阳
Description: To achieve a simple function of the signal generator. System power-up, the default output low (no waveform), the default initial frequency of 1 kHz. Waveform output frequency by the development board DIP switch SW0 ~ SW3 adjustment, adjustable range 1KHz to 2KHz, stepping amount 100Hz. Waveform output by the development board DAC_A mouth. Total square wave and triangular wave, sine wave three waveforms to choose from, users simply the development of on-board DIP switch SW6- SW7 set to different values of a combination of different waveforms can be output. The duty cycle of the square wave with the key switch on the development board BTN0 ~ BTN1 regulation. System reset button for the development of the key switch on the BT7. In addition, after the acceptance of the experiment, I continue to add sawtooth output.
To Search:
File list (Check if you may need any files):
func_gen\adjust.bsf
........\adjust.vhd
........\adjust.vhd.bak
........\choose_wave.bsf
........\choose_wave.vhd
........\choose_wave.vhd.bak
........\dlt_gen.bsf
........\dlt_gen.vhd
........\dlt_gen.vhd.bak
........\frq.bsf
........\frq.vhd
........\frq.vhd.bak
........\func_gen.asm.rpt
........\func_gen.bdf
........\func_gen.cdf
........\func_gen.done
........\func_gen.dpf
........\func_gen.fit.rpt
........\func_gen.fit.smsg
........\func_gen.fit.summary
........\func_gen.flow.rpt
........\func_gen.map.rpt
........\func_gen.map.summary
........\func_gen.pin
........\func_gen.pof
........\func_gen.qpf
........\func_gen.qsf
........\func_gen.qws
........\func_gen.sim.rpt
........\func_gen.tan.rpt
........\func_gen.tan.summary
........\func_gen.vwf
........\func_gen_assignment_defaults.qdf
........\incremental_db
........\..............\compiled_partitions
........\..............\...................\func_gen.root_partition.map.kpt
........\..............\README
........\par2ser.bsf
........\par2ser.vhd
........\par2ser.vhd.bak
........\sin_gen.bsf
........\sin_gen.vhd
........\sin_gen.vhd.bak
........\sqr_gen.bsf
........\sqr_gen.vhd
........\sqr_gen.vhd.bak
........\tlv5638.bsf
........\tlv5638.vhd
........\tlv5638.vhd.bak
Download