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Title: digital-colok Download
  • Category:
  • VHDL-FPGA-Verilog
  • Tags:
  • File Size:
  • 9.87mb
  • Update:
  • 2013-04-21
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 Description: With written in VHDL quartusII code, the output is the digital clock is displayed on the board, you can also reset, and the time.
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partii\test\clock.vhd
......\....\clock.vhd.bak
......\....\db\abs_divider_kbg.tdf
......\....\..\add_sub_lkc.tdf
......\....\..\add_sub_mkc.tdf
......\....\..\alt_u_div_k2f.tdf
......\....\..\alt_u_div_m5f.tdf
......\....\..\lpm_abs_0s9.tdf
......\....\..\lpm_abs_gq9.tdf
......\....\..\lpm_divide_38m.tdf
......\....\..\lpm_divide_7so.tdf
......\....\..\mux_3nc.tdf
......\....\..\mux_joc.tdf
......\....\..\prev_cmp_tt.asm.qmsg
......\....\..\prev_cmp_tt.fit.qmsg
......\....\..\prev_cmp_tt.map.qmsg
......\....\..\prev_cmp_tt.qmsg
......\....\..\prev_cmp_tt.sim.qmsg
......\....\..\prev_cmp_tt.tan.qmsg
......\....\..\sign_div_unsign_anh.tdf
......\....\..\tt.asm.qmsg
......\....\..\tt.asm_labs.ddb
......\....\..\tt.cbx.xml
......\....\..\tt.cmp.bpm
......\....\..\tt.cmp.cdb
......\....\..\tt.cmp.ecobp
......\....\..\tt.cmp.hdb
......\....\..\tt.cmp.kpt
......\....\..\tt.cmp.logdb
......\....\..\tt.cmp.rdb
......\....\..\tt.cmp.tdb
......\....\..\tt.cmp0.ddb
......\....\..\tt.cmp_merge.kpt
......\....\..\tt.db_info
......\....\..\tt.eco.cdb
......\....\..\tt.eds_overflow
......\....\..\tt.fit.qmsg
......\....\..\tt.fnsim.cdb
......\....\..\tt.fnsim.hdb
......\....\..\tt.fnsim.qmsg
......\....\..\tt.hier_info
......\....\..\tt.hif
......\....\..\tt.map.bpm
......\....\..\tt.map.cdb
......\....\..\tt.map.ecobp
......\....\..\tt.map.hdb
......\....\..\tt.map.kpt
......\....\..\tt.map.logdb
......\....\..\tt.map.qmsg
......\....\..\tt.map_bb.cdb
......\....\..\tt.map_bb.hdb
......\....\..\tt.map_bb.hdbx
......\....\..\tt.map_bb.logdb
......\....\..\tt.pre_map.cdb
......\....\..\tt.pre_map.hdb
......\....\..\tt.psp
......\....\..\tt.rpp.qmsg
......\....\..\tt.rtlv.hdb
......\....\..\tt.rtlv_sg.cdb
......\....\..\tt.rtlv_sg_swap.cdb
......\....\..\tt.sgate.rvd
......\....\..\tt.sgate_sm.rvd
......\....\..\tt.sgdiff.cdb
......\....\..\tt.sgdiff.hdb
......\....\..\tt.sim.cvwf
......\....\..\tt.sim.hdb
......\....\..\tt.sim.qmsg
......\....\..\tt.sim.rdb
......\....\..\tt.simfam
......\....\..\tt.sld_design_entry.sci
......\....\..\tt.sld_design_entry_dsc.sci
......\....\..\tt.syn_hier_info
......\....\..\tt.tan.qmsg
......\....\..\tt.tis_db_list.ddb
......\....\..\tt.tmw_info
......\....\..\wed.wsf
......\....\incremental_db\compiled_partitions\tt.db_info
......\....\..............\...................\tt.root_partition.cmp.atm
......\....\..............\...................\tt.root_partition.cmp.dfp
......\....\..............\...................\tt.root_partition.cmp.hdbx
......\....\..............\...................\tt.root_partition.cmp.kpt
......\....\..............\...................\tt.root_partition.cmp.logdb
......\....\..............\...................\tt.root_partition.cmp.rcf
......\....\..............\...................\tt.root_partition.map.atm
......\....\..............\...................\tt.root_partition.map.dpi
......\....\..............\...................\tt.root_partition.map.hdbx
......\....\..............\...................\tt.root_partition.map.kpt
......\....\..............\README
......\....\time_counter.vhd
......\....\time_counter.vhd.bak
......\....\tt.asm.rpt
......\....\tt.done
......\....\tt.dpf
......\....\tt.fit.rpt
......\....\tt.fit.smsg
......\....\tt.fit.summary
......\....\tt.flow.rpt
......\....\tt.jpg
......\....\tt.map.rpt
......\....\tt.map.summary
    

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