Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: Seven-voting-machines Download
 Description: Written in verilog seven voting machine code can be achieved seven people to vote on the adoption of more than four functions
 Downloaders recently: [More information of uploader tang]
 To Search:
File list (Check if you may need any files): 
 

work1
.....\voter_7.cr.mti
.....\voter_7.mpf
.....\voter_7.vo
.....\voter_7_tb.v
.....\voter_7_tb.v.bak
.....\voter_7_v.sdo
.....\voter_7_v.sdo_typ.csd
.....\vsim.wlf
.....\work
.....\....\voter_7
.....\....\.......\verilog.asm64
.....\....\.......\verilog.rw64
.....\....\.......\_primary.dat
.....\....\.......\_primary.dbs
.....\....\.......\_primary.vhd
.....\....\voter_7_tb
.....\....\..........\verilog.asm64
.....\....\..........\verilog.rw64
.....\....\..........\_primary.dat
.....\....\..........\_primary.dbs
.....\....\..........\_primary.vhd
.....\....\_info
.....\....\_temp
.....\....\_vmake

CodeBus www.codebus.net