王金明：《Verilog HDL 程序设计教程》程序
........................................\chap10
........................................\......\acc.acf
........................................\......\acc.hif
........................................\......\acc.v
........................................\......\accn.v
........................................\......\add8.v
........................................\......\adder8.v
........................................\......\block1.v
........................................\......\block2.v
........................................\......\block3.v
........................................\......\block4.v
........................................\......\control.v
........................................\......\fsm.v
........................................\......\longframe1.v
........................................\......\longframe2.v
........................................\......\pipeline.v
........................................\......\reg8.v
........................................\......\resource1.v
........................................\......\resource2.v
........................................\......\transcript
........................................\chap11
........................................\......\account.v
........................................\......\clock.v
........................................\......\count10.v
........................................\......\fre_ctrl.v
........................................\......\latch_16.v
........................................\......\paobiao.v
........................................\......\sell.v
........................................\......\song.v
........................................\......\traffic.v
........................................\......\transcript
........................................\chap12
........................................\......\add_ahead.v
........................................\......\add_bx.v
........................................\......\add_jl.v
........................................\......\add_tree.v
........................................\......\correlator.v
........................................\......\crc.v
........................................\......\cycle.v
........................................\......\decoder1.v
........................................\......\decoder2.v
........................................\......\fir.v
........................................\......\linear.v
........................................\......\mult.v
........................................\......\mult4x4.v
........................................\......\transcript
........................................\......\work
........................................\......\....\_info
........................................\chap3
........................................\.....\adder4.acf
........................................\.....\adder4.hif
........................................\.....\adder4.ndb
........................................\.....\adder4.v
........................................\.....\adder_tp.v
........................................\.....\aoi.v
........................................\.....\count4.v
........................................\.....\count4_tp.v
........................................\chap5
........................................\.....\adder.v
........................................\.....\adder16.v
........................................\.....\alu.v
........................................\.....\block.v
........................................\.....\buried_ff.v
........................................\.....\compile.v
........................................\.....\count.v
........................................\.....\count60.v
........................................\.....\decode4_7.v
........................................\.....\loop1.v
........................................\.....\loop2.v
........................................\.....\loop3.v
........................................\.....\mult_for.v
........................................\.....\