Description: • Source code of designs in chapters 1 to 8.
• Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files.
• Several Designs, including SAYEH, that are programmed on Altera’s UP2 board are included in “Quartus UP2 Designs.zip”
• The OVL directory has OVL library version 1.0 and its documentations
• In the Software directory, the Altera directory contains Quartus II, related tools, and Altera device specifications. Please connect to www.altera.com and then click on “University Program” to obtain a license for Quartus II Web Edition.
• In the Software directory, The MentorGraphics directory has the ModelSim-Altera simulation program. Please connect to www.altera.com and then click on “University Program” to obtain a license for ModelSim-Altera.
To Search:
File list (Check if you may need any files):
Chapter 2\ALU.v
.........\ALUTester.v
.........\Counter4.v
.........\Counter4Tester.v
.........\Detector110.v
.........\Detector110Tester.v
.........\flop.v
.........\FlopTester.v
.........\MultiplexerA.v
.........\MultiplexerA2to1.v
.........\MultiplexerB.v
.........\MultiplexerC.v
.........\MultiplexerD.v
.........\MultiplexerE.v
.........\MultiplexerTester.v
.........\Mux8.v
.........\Mux8Tester.v
.........\ShiftRegister.v
.........\ShiftRegisterTester.v
.........\Synchronizer.v
.........\SynchronizerTester.v
Chapter 2
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