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Title: vhdl-ad9910 Download
 Description: ad9910 DDS board VHDL source code, in the Cyclone II FPGA debugging through the main file description: Filename Function----------------------------------------------------- dds_controller.vhd top entity, opcode decoding ddslib.vhd configuration, opcode definition dds_serial.vhd parallel to serial decoding fifo.vhd FIFO megafunction intance phase_register.vhd phase registers
 Downloaders recently: [More information of uploader haobin705]
 To Search: AD9910 FPGA vhdl
File list (Check if you may need any files):
vhdl-ad9910\.hgtags
...........\.hg_archival.txt
...........\constant.vhd
...........\constant_inst.vhd
...........\db\dds_controller.sim.vwf
...........\..\dds_serial_bus.sim.vwf
...........\ddslib.vhd
...........\dds_controller.cdf
...........\dds_controller.dpf
...........\dds_controller.jdi
...........\dds_controller.pin
...........\dds_controller.qpf
...........\dds_controller.qsf
...........\dds_controller.stp
...........\dds_controller.vhd
...........\dds_controller.vwf
...........\dds_controller_assignment_defaults.qdf
...........\dds_controller_sequencer.vwf
...........\dds_controller_sequencer2.vwf
...........\dds_serial_bus.dpf
...........\dds_serial_bus.pin
...........\dds_serial_bus.qpf
...........\dds_serial_bus.qsf
...........\dds_serial_bus.qws
...........\dds_serial_bus.vhd
...........\dds_serial_bus.vwf
...........\dds_serial_bus_assignment_defaults.qdf
...........\dfs.ptf
...........\dfs.vhd
...........\fifo_mf.vhd
...........\fifo_mf_inst.vhd
...........\LICENSE
...........\make-doc.sh
...........\phase_register.stp
...........\phase_register.vhd
...........\phase_register_orig.vhd
...........\profile_dds.stp
...........\README
...........\test\const1.vhd
...........\....\const1_inst.vhd
...........\....\db\test.sim.vwf
...........\....\test.pin
...........\....\test.qpf
...........\....\test.vwf
...........\TESTLOG
...........\test_lvds_bus.stp
...........\test_lvds_bus.vhd
...........\TODO
...........\V0_1.qsf
...........\V0_1_assignment_defaults.qdf
...........\wrapper\analyzer.vhd
...........\.......\analyzer_inst.vhd
...........\.......\wrapper.pin
...........\.......\wrapper.qpf
...........\.......\wrapper.vhd
...........\test\db
...........\db
...........\test
...........\wrapper
vhdl-ad9910
    

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