XHDL4[1].0.40 Achieved between VHDL and verilog la

Title: XHDL4[1].0.40

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Category:
VHDL-FPGA-Verilog
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File Size:
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Update:
2012-11-26
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Uploaded by:
shuyagang

Description: Achieved between VHDL and verilog language conversion between programs so easy, XHDL version 4.0.40.

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File list (Check if you may need any files):

XHDL4[1].0.40\XHDL4.0.40\bin\mingwm10.dll
.............\..........\...\QtCore4.dll
.............\..........\...\QtGui4.dll
.............\..........\...\QtNetwork4.dll
.............\..........\...\xhdl.exe
.............\..........\...\xhdlc.exe
.............\..........\docs\pdf\change_log.pdf
.............\..........\....\...\X-HDL.pdf
.............\..........\....\...\XLM.pdf
.............\..........\packages\non_synthesizable\XHDL_bit.vhdl
.............\..........\........\.................\XHDL_misc.vhdl
.............\..........\........\.................\XHDL_std_logic.vhdl
.............\..........\........\.................\XHDL_std_ulogic.vhdl
.............\..........\........\synthesizable\XHDL_bit.vhdl
.............\..........\........\.............\XHDL_std_logic.vhdl
.............\..........\........\.............\XHDL_std_ulogic.vhdl
.............\..........\util\make_lib.pl
.............\..........\docs\pdf
.............\..........\packages\non_synthesizable
.............\..........\........\synthesizable
.............\..........\bin
.............\..........\docs
.............\..........\license
.............\..........\packages
.............\..........\util
.............\XHDL4.0.40
XHDL4[1].0.40

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