Description: Design with VHDL, digital clock, to achieve in the digital display minutes and seconds, and you can manually adjust the minutes, to achieve the increase or decrease minutes. The design includes the following sections: (1) frequency circuit design, produce 1Hz clock signal, as the second timing pulse (2) Manual adjustment circuit, including " the increase" " decrease the time" " point by" " sub- less. " (3), minute and second timing circuits. (4) 7-segment display circuit.
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clock.vhd
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