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Title: res Download
 Description: FPGA-based design of six-way Responder is my part in the graduation, took a long time writing, through the simulation and experimental testing, hope you like it, with the exchange, together with progress
 Downloaders recently: [More information of uploader 276717512]
 To Search:
  • [1] - Four Responder, with time only recognize
  • [2010_07_01_VHDL] - Based VHLD and Quartus II 8.0 of the Res
  • [LCD1602_LEVEL4] - Based on FPGA-EP1C3 the LCD1602 driver.
File list (Check if you may need any files):
res\CLKGEN\CLKGEN.asm.rpt
...\......\CLKGEN.bsf
...\......\CLKGEN.done
...\......\CLKGEN.fit.rpt
...\......\CLKGEN.fit.summary
...\......\CLKGEN.flow.rpt
...\......\CLKGEN.map.rpt
...\......\CLKGEN.map.summary
...\......\CLKGEN.pin
...\......\CLKGEN.pof
...\......\CLKGEN.qpf
...\......\CLKGEN.qsf
...\......\CLKGEN.qws
...\......\CLKGEN.sim.rpt
...\......\CLKGEN.sof
...\......\CLKGEN.tan.rpt
...\......\CLKGEN.tan.summary
...\......\CLKGEN.vhd
...\......\CLKGEN.vwf
...\......\db\add_sub_5sh.tdf
...\......\..\CLKGEN.asm.qmsg
...\......\..\CLKGEN.cbx.xml
...\......\..\CLKGEN.cmp.cdb
...\......\..\CLKGEN.cmp.hdb
...\......\..\CLKGEN.cmp.logdb
...\......\..\CLKGEN.cmp.rdb
...\......\..\CLKGEN.cmp.tdb
...\......\..\CLKGEN.cmp0.ddb
...\......\..\CLKGEN.dbp
...\......\..\CLKGEN.db_info
...\......\..\CLKGEN.eco.cdb
...\......\..\CLKGEN.eds_overflow
...\......\..\CLKGEN.fit.qmsg
...\......\..\CLKGEN.hier_info
...\......\..\CLKGEN.hif
...\......\..\CLKGEN.map.cdb
...\......\..\CLKGEN.map.hdb
...\......\..\CLKGEN.map.logdb
...\......\..\CLKGEN.map.qmsg
...\......\..\CLKGEN.pre_map.cdb
...\......\..\CLKGEN.pre_map.hdb
...\......\..\CLKGEN.psp
...\......\..\CLKGEN.pss
...\......\..\CLKGEN.rtlv.hdb
...\......\..\CLKGEN.rtlv_sg.cdb
...\......\..\CLKGEN.rtlv_sg_swap.cdb
...\......\..\CLKGEN.sgdiff.cdb
...\......\..\CLKGEN.sgdiff.hdb
...\......\..\CLKGEN.sim.cvwf
...\......\..\CLKGEN.sim.hdb
...\......\..\CLKGEN.sim.qmsg
...\......\..\CLKGEN.sim.rdb
...\......\..\CLKGEN.sld_design_entry.sci
...\......\..\CLKGEN.sld_design_entry_dsc.sci
...\......\..\CLKGEN.syn_hier_info
...\......\..\CLKGEN.tan.qmsg
...\......\..\CLKGEN.tis_db_list.ddb
...\......\..\prev_cmp_CLKGEN.qmsg
...\......\..\prev_cmp_CLKGEN.sim.qmsg
...\......\..\wed.wsf
...\......\db
...\CLKGEN
...\HBF\db\HBF.asm.qmsg
...\...\..\HBF.cbx.xml
...\...\..\HBF.cmp.cdb
...\...\..\HBF.cmp.hdb
...\...\..\HBF.cmp.logdb
...\...\..\HBF.cmp.rdb
...\...\..\HBF.cmp.tdb
...\...\..\HBF.cmp0.ddb
...\...\..\HBF.dbp
...\...\..\HBF.db_info
...\...\..\HBF.eco.cdb
...\...\..\HBF.eds_overflow
...\...\..\HBF.fit.qmsg
...\...\..\HBF.hier_info
...\...\..\HBF.hif
...\...\..\HBF.map.cdb
...\...\..\HBF.map.hdb
...\...\..\HBF.map.logdb
...\...\..\HBF.map.qmsg
...\...\..\HBF.pre_map.cdb
...\...\..\HBF.pre_map.hdb
...\...\..\HBF.psp
...\...\..\HBF.pss
...\...\..\HBF.rtlv.hdb
...\...\..\HBF.rtlv_sg.cdb
...\...\..\HBF.rtlv_sg_swap.cdb
...\...\..\HBF.sgdiff.cdb
...\...\..\HBF.sgdiff.hdb
...\...\..\HBF.sim.cvwf
...\...\..\HBF.sim.hdb
...\...\..\HBF.sim.qmsg
...\...\..\HBF.sim.rdb
...\...\..\HBF.sld_design_entry.sci
...\...\..\HBF.sld_design_entry_dsc.sci
...\...\..\HBF.syn_hier_info
...\...\..\HBF.tan.qmsg
...\...\..\HBF.tis_db_list.ddb
...\...\..\prev_cmp_HBF.qmsg
    

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