Description: 1. Save the source file in the src directory, QII project files in the directory Proj 2. Program can display at VGA display with 800x600 resolution and square-wave sample letters Example 3. Specific design reference code.
To Search:
File list (Check if you may need any files):
S6_VGA_change
.............\Doc
.............\...\程序说明.txt
.............\Proj
.............\....\cmp_state.ini
.............\....\ColorBar.asm.rpt
.............\....\ColorBar.cdf
.............\....\ColorBar.done
.............\....\ColorBar.eda.rpt
.............\....\ColorBar.fit.eqn
.............\....\ColorBar.fit.rpt
.............\....\ColorBar.fit.smsg
.............\....\ColorBar.fit.summary
.............\....\ColorBar.flow.rpt
.............\....\ColorBar.jdi
.............\....\ColorBar.map.eqn
.............\....\ColorBar.map.rpt
.............\....\ColorBar.map.summary
.............\....\ColorBar.mif
.............\....\ColorBar.pin
.............\....\ColorBar.pof
.............\....\ColorBar.qpf
.............\....\ColorBar.qsf
.............\....\ColorBar.qws
.............\....\ColorBar.sof
.............\....\ColorBar.tan.rpt
.............\....\ColorBar.tan.summary
.............\....\ColorBar_assignment_defaults.qdf
.............\....\db
.............\....\..\altsyncram_qso3.tdf
.............\....\..\cntr_72i.tdf
.............\....\..\cntr_cmi.tdf
.............\....\..\cntr_o3i.tdf
.............\....\..\cntr_qsi.tdf
.............\....\..\ColorBar.db_info
.............\....\..\ColorBar.eco.cdb
.............\....\..\ColorBar.sld_design_entry.sci
.............\....\..\decode_9jf.tdf
.............\....\..\decode_ogi.tdf
.............\....\..\mux_ngc.tdf
.............\....\..\prev_cmp_ColorBar.map.qmsg
.............\....\..\prev_cmp_ColorBar.qmsg
.............\....\rom.bsf
.............\....\rom.v
.............\....\rom_8.bsf
.............\....\rom_8.v
.............\....\rom_8_bb.v
.............\....\rom_bb.v
.............\....\simulation
.............\....\..........\modelsim
.............\....\..........\........\ColorBar.vo
.............\....\..........\........\ColorBar_modelsim.xrf
.............\....\..........\........\ColorBar_v.sdo
.............\....\..........\........\cyclone_atoms.v
.............\....\..........\........\vga_test.cr.mti
.............\....\..........\........\vga_test.mpf
.............\....\..........\........\vga_test.v
.............\....\..........\........\vga_vl.v
.............\....\..........\........\vsim.wlf
.............\....\..........\........\wave.do
.............\....\..........\........\work
.............\....\..........\........\....\@c@y@c@l@o@n@e_@p@r@i@m_@d@f@f@e
.............\....\..........\........\....\................................\verilog.asm
.............\....\..........\........\....\................................\_primary.dat
.............\....\..........\........\....\................................\_primary.vhd
.............\....\..........\........\....\@color@bar
.............\....\..........\........\....\..........\verilog.asm
.............\....\..........\........\....\..........\_primary.dat
.............\....\..........\........\....\..........\_primary.vhd
.............\....\..........\........\....\cyclone_and1
.............\....\..........\........\....\cyclone_and16
.............\....\..........\........\....\.............\verilog.asm
.............\....\..........\........\....\.............\_primary.dat
.............\....\..........\........\....\.............\_primary.vhd
.............\....\..........\........\....\............\verilog.asm
.............\....\..........\........\....\............\_primary.dat
.............\....\..........\........\....\............\_primary.vhd
.............\....\..........\........\....\cyclone_asmiblock
.............\....\..........\........\....\.................\verilog.asm
.............\....\..........\........\....\.................\_primary.dat
.............\....\..........\........\....\.................\_primary.vhd
.............\....\..........\........\....\cyclone_asynch_io
.............\....\..........\........\....\.................\verilog.asm
.............\....\..........\........\....\.................\_primary.dat
.............\....\..........\........\....\.................\_primary.vhd
.............\....\..........\........\....\cyclone_asynch_lcell
.............\....\..........\........\....\.....
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