Description: . The use of schematic and text input method input method to achieve full subtracter, hierarchical design, the bottom of the half adder (also used schematic entry method), and logic gates 2 shows the design of the simulation waveform 3. Select the experimental circuit to verify the result by the LED indicator is displayed.
To Search:
File list (Check if you may need any files):
一位二进制全减器.doc
Download