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Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: UART Download
 Description: UART FPGA-based design, including the receiver module, sending module, FIFO module
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File list (Check if you may need any files):
UART
....\db
....\..\altsyncram_7kd1.tdf
....\..\a_dpfifo_0r21.tdf
....\..\cmpr_un8.tdf
....\..\cntr_95b.tdf
....\..\cntr_a5b.tdf
....\..\cntr_m57.tdf
....\..\prev_cmp_UART.asm.qmsg
....\..\prev_cmp_UART.eda.qmsg
....\..\prev_cmp_UART.fit.qmsg
....\..\prev_cmp_UART.map.qmsg
....\..\prev_cmp_UART.qmsg
....\..\prev_cmp_UART.sim.qmsg
....\..\prev_cmp_UART.tan.qmsg
....\..\scfifo_pk21.tdf
....\..\UART.asm.qmsg
....\..\UART.asm_labs.ddb
....\..\UART.cbx.xml
....\..\UART.cmp.cdb
....\..\UART.cmp.hdb
....\..\UART.cmp.kpt
....\..\UART.cmp.logdb
....\..\UART.cmp.rdb
....\..\UART.cmp.tdb
....\..\UART.cmp0.ddb
....\..\UART.db_info
....\..\UART.eco.cdb
....\..\UART.eda.qmsg
....\..\UART.eds_overflow
....\..\UART.fit.qmsg
....\..\UART.hier_info
....\..\UART.hif
....\..\UART.lpc.html
....\..\UART.lpc.rdb
....\..\UART.lpc.txt
....\..\UART.map.cdb
....\..\UART.map.hdb
....\..\UART.map.logdb
....\..\UART.map.qmsg
....\..\UART.pre_map.cdb
....\..\UART.pre_map.hdb
....\..\UART.rpp.qmsg
....\..\UART.rtlv.hdb
....\..\UART.rtlv_sg.cdb
....\..\UART.rtlv_sg_swap.cdb
....\..\UART.sgate.rvd
....\..\UART.sgate_sm.rvd
....\..\UART.sgdiff.cdb
....\..\UART.sgdiff.hdb
....\..\UART.sim.cvwf
....\..\UART.sim.hdb
....\..\UART.sim.qmsg
....\..\UART.sim.rdb
....\..\UART.sld_design_entry.sci
....\..\UART.sld_design_entry_dsc.sci
....\..\UART.smp_dump.txt
....\..\UART.syn_hier_info
....\..\UART.tan.qmsg
....\..\UART.tis_db_list.ddb
....\..\UART_global_asgn_op.abo
....\..\wed.wsf
....\Fifo.v
....\Fifo.v.bak
....\incremental_db
....\..............\compiled_partitions
....\..............\...................\UART.root_partition.map.kpt
....\..............\README
....\Rx.v
....\Rx.v.bak
....\serv_req_info.txt
....\simulation
....\..........\modelsim
....\..........\........\UART.sft
....\..........\........\UART.vo
....\..........\........\UART_modelsim.xrf
....\..........\........\UART_v.sdo
....\tx.v
....\tx.v.bak
....\UART.asm.rpt
....\UART.done
....\UART.dpf
....\UART.eda.rpt
....\UART.fit.rpt
....\UART.fit.smsg
....\UART.fit.summary
....\UART.flow.rpt
....\UART.map.rpt
....\UART.map.summary
....\UART.pin
....\UART.pof
....\UART.qpf
....\UART.qsf
....\UART.sim.rpt
....\UART.sof
....\UART.tan.rpt
....\UART.tan.summary
....\UART.v
....\UART.v.bak
....\UART.vwf
    

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