Description: Verilog HDL as a standard hardware description language, is widely used in circuit design. Description of his design can be supported by different tools, different devices can be used to achieve. Using Verilog HDL language top-down design approach traffic light control system to achieve the normal operation of road transport, highlighting its good as a hardware description language, readability, portability and ease of understanding, etc., and completed by Xilinx ISE6.02 and ModelSim5.6 synthesis, simulation. Through this program downloaded to the FPGA chip, can be applied to the actual traffic light control system.
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honglvdeng.txt
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