Description: 8* 8 LED written with VERILOG FPGA, procedures, and this is used in a recent project, download used in recent projects, please credit!
File list (Check if you may need any files):
8X8LED态显示\cmp_state.ini
............\db\seg70.asm.qmsg
............\..\seg70.asm_labs.ddb
............\..\seg70.cbx.xml
............\..\seg70.cmp.cdb
............\..\seg70.cmp.hdb
............\..\seg70.cmp.kpt
............\..\seg70.cmp.logdb
............\..\seg70.cmp.rdb
............\..\seg70.cmp.tdb
............\..\seg70.cmp0.ddb
............\..\seg70.cmp2.ddb
............\..\seg70.db_info
............\..\seg70.eco.cdb
............\..\seg70.fit.qmsg
............\..\seg70.hier_info
............\..\seg70.hif
............\..\seg70.lpc.html
............\..\seg70.lpc.rdb
............\..\seg70.lpc.txt
............\..\seg70.map.cdb
............\..\seg70.map.hdb
............\..\seg70.map.logdb
............\..\seg70.map.qmsg
............\..\seg70.pre_map.cdb
............\..\seg70.pre_map.hdb
............\..\seg70.rtlv.hdb
............\..\seg70.rtlv_sg.cdb
............\..\seg70.rtlv_sg_swap.cdb
............\..\seg70.sgdiff.cdb
............\..\seg70.sgdiff.hdb
............\..\seg70.sld_design_entry.sci
............\..\seg70.sld_design_entry_dsc.sci
............\..\seg70.syn_hier_info
............\..\seg70.tan.qmsg
............\..\seg70.tis_db_list.ddb
............\..\seg70.tmw_info
............\incremental_db\compiled_partitions\seg70.root_partition.map.kpt
............\..............\README
............\output_file.map
............\seg70.asm.rpt
............\seg70.cdf
............\seg70.done
............\seg70.dpf
............\seg70.fit.eqn
............\seg70.fit.rpt
............\seg70.fit.smsg
............\seg70.fit.summary
............\seg70.flow.rpt
............\seg70.hexout
............\seg70.map.eqn
............\seg70.map.rpt
............\seg70.map.summary
............\seg70.pin
............\seg70.pof
............\seg70.qpf
............\seg70.qsf
............\seg70.qws
............\seg70.sof
............\seg70.tan.rpt
............\seg70.tan.summary
............\seg70.ttf
............\seg70.vhd
............\seg70_assignment_defaults.qdf
............\incremental_db\compiled_partitions
............\db
............\incremental_db
8X8LED态显示
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