Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: asynchro2bitupdownneg Download
 Description: this is a verilog code for asynchronous 2 bit up down counter with negative edge triggered.
 Downloaders recently: [More information of uploader swapna6688]
 To Search:
File list (Check if you may need any files):
asynchro2bitupdownneg\asynchro2bitupdownneg.dhp
.....................\asynchro2bitupdownneg.ise
.....................\asynchro2bitupdownneg.ise_ISE_Backup
.....................\asynchro2bitupdownneg.ldo
.....................\asynchro2bitupdownneg.lso
.....................\asynchro2bitupdownneg.prj
.....................\asynchro2bitupdownneg.stx
.....................\asynchro2bitupdownneg.v
.....................\asynchro2bitupdownneg_vhdl.prj
.....................\automake.log
.....................\prjname.lso
.....................\Project.dhp
.....................\transcript
.....................\vsim.wlf
.....................\wavefodown
.....................\waveforup
.....................\.ork\asynchro2bitupdownneg\verilog.psm
.....................\....\.....................\_primary.dat
.....................\....\.....................\_primary.vhd
.....................\....\dff\verilog.psm
.....................\....\...\_primary.dat
.....................\....\...\_primary.vhd
.....................\....\glbl\verilog.psm
.....................\....\....\_primary.dat
.....................\....\....\_primary.vhd
.....................\....\jkff\verilog.psm
.....................\....\....\_primary.dat
.....................\....\....\_primary.vhd
.....................\....\_info
.....................\xst\work\hdllib.ref
.....................\...\....\vlg19\jkff.bin
.....................\...\....\...27\asynchro2bitupdownneg.bin
.....................\...\....\....8\dff.bin
.....................\__projnav\asynchro2bitupdownneg.gfl
.....................\.........\asynchro2bitupdownneg.xst
.....................\.........\asynchro2bitupdownneg_flowplus.gfl
.....................\.........\xst_sprjTOstx_tcl.rsp
.....................\__projnav.log
.....................\xst\work\vlg19
.....................\...\....\vlg27
.....................\...\....\vlg28
.....................\work\asynchro2bitupdownneg
.....................\....\dff
.....................\....\glbl
.....................\....\jkff
.....................\xst\work
.....................\work
.....................\xst
.....................\_xmsgs
.....................\__projnav
asynchro2bitupdownneg
    

CodeBus www.codebus.net