Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: Gate.level.adder Download
 Description: Verilog Gate Level adder and testbenck
 Downloaders recently: [More information of uploader zhenyu.wuya]
 To Search:
  • [Full.adder] - Verilog RTL level full adder and test be
  • [GCD] - Verilog GCD Design and synthesis layout
File list (Check if you may need any files):
gate.v
trans.v
    

CodeBus www.codebus.net