- Category:
- Document
- Tags:
-
[WORD]
- File Size:
- 21kb
- Update:
- 2012-11-26
- Downloads:
- 0 Times
- Uploaded by:
- imzjw
Description: Analog spi-driven flash
SO: Serial data output pin, in a read operation in the process of shifting the output data from the SO pin. The falling edge of the clock when the data changes.
SI: Serial data input pin, all opcodes, byte addresses, and write data from the SI pin, the rising edge of the clock when the data is locked.
SCK: Serial Clock, control bus data input and output timing.
/ CS: chip enable signal, when it is high, the chip is not selected, SO feet for the high-impedance state, unless an internal write operation is in progress, otherwise the chip is in standby mode when the pin is low, the chip is active mode, power-on after the CS pin is required before any operation of the one from high to low transition.
/ WP: When the WP pin is low, the chip ban writing, but other functions properly. When the WP pin is HIGH, all functions are normal. When CS is low, WP into a low, interrupted write operations on the chip. However, if the internal write cycle has been init
To Search:
File list (Check if you may need any files):
模拟SPI协议.doc
Download