Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: itrl Download
 Description: Intertwined in this program is to prepare its own random interleaving can achieve any arbitrary length of the intertwined dimensions of the implementation is more than the other type has the extension
 Downloaders recently: [More information of uploader zengguanjun]
 To Search:
File list (Check if you may need any files):
交织\deintrl.m
....\intrl.m
....\交织 .doc
交织
    

CodeBus www.codebus.net