clock\clock.ise
.....\clock.ise_ISE_Backup
.....\clock.restore
.....\isim\temp\hdllib.ref
.....\....\....\hdpdeps.ref
.....\....\....\vlg1E\real__time__clk__verilog.bin
.....\....\....\...2D\glbl.bin
.....\....\work\glbl\glbl.h
.....\....\....\....\mingw\glbl.obj
.....\....\....\hdllib.ref
.....\....\....\hdpdeps.ref
.....\....\....\real__time__clk__verilog\mingw\real__time__clk__verilog.obj
.....\....\....\........................\real__time__clk__verilog.h
.....\....\....\........................\xsimreal__time__clk__verilog.cpp
.....\....\....\vlg1E\real__time__clk__verilog.bin
.....\....\....\...2D\glbl.bin
.....\isim.cmd
.....\isim.hdlsourcefiles
.....\isim.log
.....\.....tmp_save\_1
.....\isimwavedata.xwv
.....\real_time_clk_verilog.v
.....\real_time_clk_verilog_beh.prj
.....\real_time_clk_verilog_isim_beh.exe
.....\real_time_clk_verilog_isim_beh.wfs
.....\real_time_clk_verilog_stx.prj
.....\real_time_clk_verilog_summary.html
.....\simulate_dofile.log
.....\xilinxsim.ini
.....\_xmsgs\fuse.xmsgs
.....\__ISE_repository_clock.ise_.lock
.....\isim\work\glbl\mingw
.....\....\....\real__time__clk__verilog\mingw
.....\....\temp\vlg1E
.....\....\....\vlg2D
.....\....\work\glbl
.....\....\....\real__time__clk__verilog
.....\....\....\vlg1E
.....\....\....\vlg2D
.....\....\temp
.....\....\work
.....\isim
.....\isim.tmp_save
.....\_xmsgs
clock