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Title: dig_pll Download
 Description: A simple digital PLL can generate an input in phase with the same frequency output clock
 Downloaders recently: [More information of uploader 309088824]
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File list (Check if you may need any files): 
数字琐相环DPLL的VERLOG代码\dll\dll.cr.mti
..........................\...\dll.mpf
..........................\...\dll.v
..........................\...\test_dll.v
..........................\...\transcript
..........................\...\vsim.wlf
..........................\...\work\@p@l@l\verilog.asm
..........................\...\....\......\_primary.dat
..........................\...\....\......\_primary.vhd
..........................\...\....\test_dll\verilog.asm
..........................\...\....\........\_primary.dat
..........................\...\....\........\_primary.vhd
..........................\...\....\_info
..........................\使用说明请参看右侧注释====〉〉.txt
..........................\dll\work\@p@l@l
..........................\...\....\test_dll
..........................\...\work
..........................\dll
数字琐相环DPLL的VERLOG代码

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