74hc138
.......\74hc138.prj
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.......\........\.....\decoder_38.adb
.......\........\.....\decoder_38.dtf
.......\........\.....\..............\verify.log
.......\........\.....\decoder_38.ide_des
.......\........\.....\decoder_38.pdb
.......\........\.....\decoder_38.pdb.depends
.......\........\.....\decoder_38.tcl
.......\........\.....\decoder_38_ba.sdf
.......\........\.....\decoder_38_ba.v
.......\........\.....\designer.log
.......\........\.....\simulation
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.......\...\74hc138.v
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.......\..........\modelsim.ini
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.......\..........\presynth
.......\..........\........\decoder_38
.......\..........\........\..........\verilog.psm
.......\..........\........\..........\_primary.dat
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.......\..........\........\..........\_primary.vhd
.......\..........\........\testbench
.......\..........\........\.........\verilog.psm
.......\..........\........\.........\_primary.dat
.......\..........\........\.........\_primary.dbs
.......\..........\........\.........\_primary.vhd
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.......\..........\........\.....\vlogzyq214
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.......\.........\......\decoder_38.srr
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.......\.........\decoder_38_sdc.sdc
.......\.........\decoder_38_syn.prj
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.......\.........\stdout.log
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.......\.........\......\decoder_38.plg
.......\.........\......\decoder_38_flink.htm
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.......\.........\......\decoder_38_toc.htm
.......\.........\......\sap.log
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.......\........\sym
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.......\........\..\project.lst
.......\........\viewdraw.ini
.......\........\wir
74hc138.pdf