Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: HD_6409_file Download
 Description: HD6409 codec to achieve the fpga. In this case ,i use the the chip of alter , the verilog functions can implementate the function of HD6409.
 Downloaders recently: [More information of uploader fuhailong03]
 To Search:
File list (Check if you may need any files):
HD_6409_file
............\db
............\..\HD_6409.asm.qmsg
............\..\HD_6409.cbx.xml
............\..\HD_6409.cmp.bpm
............\..\HD_6409.cmp.cdb
............\..\HD_6409.cmp.ecobp
............\..\HD_6409.cmp.hdb
............\..\HD_6409.cmp.logdb
............\..\HD_6409.cmp.rdb
............\..\HD_6409.cmp.tdb
............\..\HD_6409.cmp0.ddb
............\..\HD_6409.cmp_bb.cdb
............\..\HD_6409.cmp_bb.hdb
............\..\HD_6409.cmp_bb.logdb
............\..\HD_6409.cmp_bb.rcf
............\..\HD_6409.dbp
............\..\HD_6409.db_info
............\..\HD_6409.eco.cdb
............\..\HD_6409.eda.qmsg
............\..\HD_6409.fit.qmsg
............\..\HD_6409.hier_info
............\..\HD_6409.hif
............\..\HD_6409.map.bpm
............\..\HD_6409.map.cdb
............\..\HD_6409.map.ecobp
............\..\HD_6409.map.hdb
............\..\HD_6409.map.logdb
............\..\HD_6409.map.qmsg
............\..\HD_6409.map_bb.cdb
............\..\HD_6409.map_bb.hdb
............\..\HD_6409.map_bb.logdb
............\..\HD_6409.pre_map.cdb
............\..\HD_6409.pre_map.hdb
............\..\HD_6409.psp
............\..\HD_6409.pss
............\..\HD_6409.rtlv.hdb
............\..\HD_6409.rtlv_sg.cdb
............\..\HD_6409.rtlv_sg_swap.cdb
............\..\HD_6409.sgdiff.cdb
............\..\HD_6409.sgdiff.hdb
............\..\HD_6409.signalprobe.cdb
............\..\HD_6409.sld_design_entry.sci
............\..\HD_6409.sld_design_entry_dsc.sci
............\..\HD_6409.smp_dump.txt
............\..\HD_6409.syn_hier_info
............\..\HD_6409.tan.qmsg
............\..\HD_6409.tis_db_list.ddb
............\..\prev_cmp_HD_6409.asm.qmsg
............\..\prev_cmp_HD_6409.eda.qmsg
............\..\prev_cmp_HD_6409.fit.qmsg
............\..\prev_cmp_HD_6409.map.qmsg
............\..\prev_cmp_HD_6409.qmsg
............\..\prev_cmp_HD_6409.tan.qmsg
............\Decode_process.v
............\FSX_Test.v
............\HD_6409.asm.rpt
............\HD_6409.done
............\HD_6409.eda.rpt
............\HD_6409.fit.rpt
............\HD_6409.fit.smsg
............\HD_6409.fit.summary
............\HD_6409.flow.rpt
............\HD_6409.map.rpt
............\HD_6409.map.summary
............\HD_6409.pin
............\HD_6409.pof
............\HD_6409.qpf
............\HD_6409.qsf
............\HD_6409.qws
............\HD_6409.sof
............\HD_6409.tan.rpt
............\HD_6409.tan.summary
............\HD_6409.v
............\simulation
............\..........\modelsim
............\..........\........\HD_6409.vo
............\..........\........\HD_6409_modelsim.xrf
............\..........\........\HD_6409_v.sdo
    

CodeBus www.codebus.net