usb20 Common interface usb2.0 development of the v

Title: usb20

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USB develop
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201kb
Update:
2012-11-26
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xiaowang

Description: Common interface usb2.0 development of the verilog code

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To Search: USB2.0 VHDL verilog usb2.0 usb2.0 in verilog USB2.0 verilog

[USB2_chip] - USB2.0 chip part of Verilog source. Open
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[USB_VHDL_coding] - USB2.0 the VHDL description, very classi
[usb_funct] - USB2.0 the Verilog source code, includin
[ofdm_modu] - OFDM FPGA using the Verilog procedures r
[USB2.0] - UTMI called USB2.0 Transceiver Macrocell
[usb_vhdl] - a reference implement of the control in
[VERILOG-USB2.0IP-core] - VERILOG language with a complete develop
[usb2.0funccore] - USB2.0 controller source code, hardware

File list (Check if you may need any files):

usb20
.....\doc
.....\...\README.txt
.....\...\STATUS.txt
.....\...\usb_doc.pdf
.....\rtl
.....\...\usbf_crc16.v
.....\...\usbf_crc5.v
.....\...\usbf_defines.v
.....\...\usbf_ep_rf.v
.....\...\usbf_ep_rf_dummy.v
.....\...\usbf_idma.v
.....\...\usbf_mem_arb.v
.....\...\usbf_pa.v
.....\...\usbf_pd.v
.....\...\usbf_pe.v
.....\...\usbf_pl.v
.....\...\usbf_rf.v
.....\...\usbf_top.v
.....\...\usbf_utmi_if.v
.....\...\usbf_utmi_ls.v
.....\...\usbf_wb.v
.....\testbench

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