Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: NIOS_II_design_of_the_USB_interface_module Download
 Description: Based on the NIOS II design of the USB interface module, you have some help.
 Downloaders recently: [More information of uploader osk5200]
 To Search: nios II
  • [hello_world_0] - This source is altera s nios II IDE deve
  • [ds18b20vddl] - Sensor DS18B20 way communication with th
  • [ISP1362] - Verilog prepared ISP1362 controller IP c
  • [JPEGvhdl] - JPEG image compression standard works of
  • [RS232] - Builder uses to integrate a larger syste
  • [sdram_ctrl1] - FPGA to read and write the VHDL procedur
  • [saa7113] - saa7113 configuration, verilog language
  • [NIOS_USB_API_demo] - In the nios system development driver us
File list (Check if you may need any files): 
Nios II的USB接口模块设计.doc

CodeBus www.codebus.net