Description: TMS320C54X of TI' s DSP chip soft-core verilog source code, can help beginners a better picture of the family of DSP-chip resources, nuclear structure, it is also useful!
- [ARM_Core] - arm Verilog HDL core ip
- [m16550a_verilog_rtl] - mentor UART IP verilog source to the tes
- [32-bit_RISC_IP_Core] - 32-bit RISC single-chip Verilog source c
- [FIFO] - Asynchronous FIFO verilog realize realiz
- [fir] - Verilog code of the design FIR filters t
- [code] - the matlab and verilog code in 《Wireless
- [USB2.0IP] - Complete Verilog language developed by U
- [Microprocessor] - Verilog HDL language proficiency of a go
- [PEG] - PEG LDPC code construction approach
- [DW_ahb_dmac_sbiu] - designware provide the source code verif
File list (Check if you may need any files):
c54x
....\c54x.mht
....\CVS
....\...\Entries
....\...\Repository
....\...\Root
....\rtl
....\...\CVS
....\...\...\Entries
....\...\...\Repository
....\...\...\Root
....\...\verilog
....\...\.......\oc54_acc.v
....\...\.......\oc54_alu.v
....\...\.......\oc54_alu_defines.v
....\...\.......\oc54_bshft.v
....\...\.......\oc54_cpu.v
....\...\.......\oc54_cssu.v
....\...\.......\oc54_exp.v
....\...\.......\oc54_mac.v
....\...\.......\oc54_treg.v
....\...\.......\timescale.v
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