Description: 10 VHDL classic example of the counter in the process of addition, tasks for example, test procedures, functions. . .
To Search:
- [32-bit_multiplier_model] - This procedure for 32-bit multiplier, fo
- [div] - FPGA debugger, test procedures, sub-freq
- [test_cnt] - VHDL language is only testing procedures
File list (Check if you may need any files):
alutask.v
alu_tp.v
code_83.v
count.v
funct.v
funct_tp.v
paral1.v
paral2.v
serial1.v
serial2.v
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