《VHDL基础及经典实例开发》源程序
................................\Chapter10
................................\.........\digital_lock
................................\.........\............\dl_cmp.vhd
................................\.........\............\dl_coder.vhd
................................\.........\............\dl_control.vhd
................................\.........\............\dl_counter.vhd
................................\.........\............\dl_reg.vhd
................................\.........\............\dl_top.gdf
................................\.........\............\dl_top.vhd
................................\Chapter11
................................\.........\I2C
................................\.........\...\i2c.vhd
................................\.........\...\i2c_control.vhd
................................\.........\...\shift.vhd
................................\.........\...\uc_interface.vhd
................................\.........\...\upcnt4.vhd
................................\Chapter12
................................\.........\fifo
................................\.........\....\empty_cmp.bsf
................................\.........\....\empty_cmp.vhd
................................\.........\....\fifo.bdf
................................\.........\....\fifo.bsf
................................\.........\....\full_cmp.bsf
................................\.........\....\full_cmp.vhd
................................\.........\....\full_empty.bdf
................................\.........\....\full_empty.bsf
................................\.........\....\G2B.bsf
................................\.........\....\G2B.vhd
................................\.........\....\gray.bsf
................................\.........\....\gray.vhd
................................\.........\....\ramdp3.bsf
................................\.........\....\ramdp3.cmp
................................\.........\....\ramdp3.inc
................................\.........\....\ramdp3.vhd
................................\.........\....\ramdp3_inst.vhd
................................\.........\....\Sync.bsf
................................\.........\....\Sync.vhd
................................\Chapter13
................................\.........\DDS
................................\.........\...\8_cd4527.gdf
................................\.........\...\cd4527.gdf
................................\.........\...\dds.vhd
................................\.........\...\fre_div.gdf
................................\.........\...\interface.vhd
................................\.........\...\phasesum.vhd
................................\.........\...\ramdp.inc
................................\.........\...\ramdp.vhd
................................\.........\...\ramdp_inst.vhd
................................\.........\...\top.gdf
................................\.........\...\t_modify.gdf
................................\Chapter14
................................\.........\vLA
................................\.........\...\ADDRER.sym
................................\.........\...\addrer.vhd
................................\.........\...\BUF.sym
................................\.........\...\buf.vhd
................................\.........\...\cmp.sym
................................\.........\...\cmp.vhd
................................\.........\...\cmp_inst.vhd
................................\.........\...\DECIPHER0.sym
................................\.........\...\decipher0.vhd
................................\.........\...\DECODE.sym
................................\.........\...\decode.vhd
................................\.........\...\FREQ.sym
................................\.........\...\freq.vhd
................................\.........\...\FRE_CODE.sym
................................\.........\...\fre_code.vhd
................................\.........\...\hunter.gdf
................................\.........\...\hunter.sym
................................\.........\...\MY373.sym
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