DE2_pio altera University Program of the Avalon bu

Title: DE2_pio

Category:
VHDL-FPGA-Verilog
Tags:
[C/C++] [源码]
File Size:
265kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
zlm21_2001

Description: altera University Program of the Avalon bus IP core, GPIO, after decompression can be directly mounted in the Avalon bus

Downloaders recently: [More information of uploader zlm21_2001]

To Search: avalon DE2_pio gpio vhdl

[Avalon_Bus_Specification] - Avalon Bus reference manual. To do the N
[i2c_master] - Avalon I2C master. Ready to use with SOP
[SiegeOfAvalon] - Lay siege to Avalon [Siege of Avalon] pu
[sopc] - The SOPC experiment - custom PWM compone
[avalon_chk_vhd] - de2 avalon checksum by vhdl
[Avalon] - Avalon Bus Specification, Chinese, detai
[Avalon_PWM_IP_pwm] - Avalon Bus IP of the PWM module. Based o
[gpio] - A GPIO design in verilog
[fifoed_avalon_uart9.1_applicaton] - Fifoed avalon uart IP core and C code fo

File list (Check if you may need any files):

altera_up_avalon_DE2_pio
........................\class.ptf
........................\doc
........................\...\PIO.pdf
........................\em_DE2_pio.pl
........................\HAL
........................\...\system.h_component_output.gtf
........................\inc
........................\...\DE2_pio_regs.h
........................\sdk
........................\...\DE2_pio_struct.h
........................\...\DE2_pio_struct.s
DE2_pio.pdf

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