Description: 8.2 LED control and simulation of VHDL procedures introduced in this section of the LED using FPGA static and dynamic display of digital clock control procedures. 1. Cases 1: FPGA-driven static LED display- File name: decoder.vhd.- Function: Decoding output module, LED connection for a total of Yang.- Last modified date: 2004.3.24.
File list (Check if you may need any files):
LEDVHDL.doc
Download