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Title: lab3 Download
 Description: verilog source code for uart design
 Downloaders recently: [More information of uploader kp030188]
 To Search: verilog uart uart verilog
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  • [uart] - uart verilog
File list (Check if you may need any files):
lab3
....\.lso
....\FIFO.bld
....\FIFO.cmd_log
....\FIFO.lfp
....\FIFO.lso
....\FIFO.ncd
....\FIFO.ngc
....\FIFO.ngd
....\FIFO.ngr
....\FIFO.pad
....\FIFO.par
....\FIFO.pcf
....\FIFO.prj
....\FIFO.stx
....\FIFO.syr
....\fifo.twr
....\fifo.twx
....\FIFO.ucf
....\FIFO.unroutes
....\FIFO.v
....\FIFO.xpi
....\FIFO.xst
....\FIFO_map.mrp
....\FIFO_map.ncd
....\FIFO_map.ngm
....\FIFO_pad.csv
....\FIFO_pad.txt
....\FIFO_prev_built.ngd
....\FIFO_stx.prj
....\FIFO_summary.html
....\FIFO_usage.xml
....\FIFO_vhdl.prj
....\isim
....\....\temp
....\....\....\hdllib.ref
....\....\....\hdpdeps.ref
....\....\....\vlg2D
....\....\....\.....\glbl.bin
....\....\....\vlg35
....\....\....\.....\test1.bin
....\....\....\vlg70
....\....\....\.....\testfifo.bin
....\....\....\vlg7C
....\....\....\.....\_f_i_f_o.bin
....\....\work
....\....\....\glbl
....\....\....\....\glbl.h
....\....\....\....\mingw
....\....\....\....\.....\glbl.obj
....\....\....\hdllib.ref
....\....\....\hdpdeps.ref
....\....\....\test1
....\....\....\.....\mingw
....\....\....\.....\.....\test1.obj
....\....\....\.....\test1.h
....\....\....\.....\xsimtest1.cpp
....\....\....\testfifo
....\....\....\........\mingw
....\....\....\........\.....\testfifo.obj
....\....\....\........\testfifo.h
....\....\....\........\xsimtestfifo.cpp
....\....\....\vlg2D
....\....\....\.....\glbl.bin
....\....\....\vlg35
....\....\....\.....\test1.bin
....\....\....\vlg70
....\....\....\.....\testfifo.bin
....\....\....\vlg7C
....\....\....\.....\_f_i_f_o.bin
....\....\....\_f_i_f_o
....\....\....\........\mingw
....\....\....\........\.....\_f_i_f_o.obj
....\....\....\........\xsim_f_i_f_o.cpp
....\....\....\........\_f_i_f_o.h
....\isim.cmd
....\isim.hdlsourcefiles
....\isim.log
....\isim.tmp_save
....\.............\_1
....\isimwavedata.xwv
....\lab3.ise
....\lab3.ise_ISE_Backup
....\lab3.ntrc_log
....\test.v
....\test1.prj
....\test1.stx
....\test1.v
....\test1.xst
....\test1_beh.prj
....\test1_isim_beh.exe
....\test1_stx.prj
....\test1_vhdl.prj
....\testfifo.prj
....\testfifo.stx
....\testfifo.v
....\testfifo.xst
....\testfifo_beh.prj
....\testfifo_isim_beh.exe
....\testfifo_stx.prj
    

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